It's an evolution of that. That was the starting point, somewhere around 1988 or 1989. I've had a lot more experience with a lot more processors since then, and changed my ideas about what's important. But the core idea - extending the 6502 by making memory locations 16 bits instead of 8 - is the same.

And yes, I have continued working on it. Most of it has been around the CPU, building the rest of the computer and writing software for it. The CPU and assembler have had a few bug fixes and some small extensions ("count leading zeros" is the most significant). I should update github. I've been holding back on that because there's one feature left to implement (stack operations should be able to select different registers for the stack pointer), and haven't found a good way to do it yet. And there have been so many distractions.

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http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

That was me many many years ago.

I admire how you created backward compatibility. The byte 'interlacing' is really nice.

You also refer to a 16 bit 3op Processor as well on that website.
A long time ago I designed a 16 bit, 16 register RISC processor and I can say that it works a charm.
Surprisingly 128KB (64K words) is a great amount for a retro computer.
Having only 16 instructions does not seem to be too restricting for RISC.
It makes the assembler very readable and easy to convert. And C/C++ compiler is doable too.

Does your 65020 have a C compiler?

(Welcome, janrinze! Your RISC16 intrigues me - I found some hints over on stardot)

Thanks. Any suggestion on where I could start a thread on this endeavour? (don't want to hijack this thread)

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

Thanks. The byte interlacing is actually the part I consider the ugliest - it's only that way because it was the natural result of "16 bit data + top 8 bits zero = original 6502 behaviour". My favourite is the cheeky re-interpretation of non-indexed addressing modes as indexed with a default index of zero. With this particular method of modifying the default, and this particular numbering of registers, that allows any Y register, stack pointer, or PC as an index for any instruction.



It does not, and it is very unlikely that it ever will. I'm not interested in writing a C compiler, and I don't expect anyone else will be sufficiently interested in this processor to provide one.

I did start writing a compiler for a language that I've invented for it, but progress on that is slow. The 65020 is a small part of a larger project - an entire computer, with every wheel getting reinvented by me. There's an infinite amount of work in there to distract me. The wheel-reinventing is why I'm not interested in a C compiler: the only reason I'd want one is so I can compile code written by other people. And why do that when I can spend another few years writing it myself?

The copy on github still needs to be updated. That got postponed until I had it running on an Artix 7, and that's waiting for me to design an adapter PCB so I can plug all the connectors into a new FPGA board. Some time in the next decade, I promise.