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PostPosted: Sat Aug 28, 2021 1:48 am 
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cbmeeks wrote:
UPDATE!

I finally got around to soldering this thing up. As stated, I got the JTAG port backwards! Ugh.
But, I was able to solder the JTAG socket on the bottom and it totally works!


Welcome to the world of CPLD!

As BDD just said, your CPLD is fast (a 7.5nS device!) so you need to pay attention to where the reference ground is and keep it as short as you can. I had removed my factory scope probe tip and associted ground clip so long ago I don't even know where to find them. They are replaced with this probe in the picture where the black ground lead can go to a standard 25mil square wirewrap post and a sharp pointed pin header to probe around. This setup minimizes the noise introduced by long leads

ATF1508 is very capable device. I'm currently re-working an EPM7128 (same as ATF1508) design for Z80 that contains a serial port, DRAM controller, 64 bytes of ROM code, bit-bang I2C, and compact flash interface. I'm adding a 5mS clock interrupt and a vectored interrupt controller for serial port & 5mS_tick. Most circuitry are buried logic and state machines. Yes, I'm running out of resources, but there are many parameters I can tweek to squeeze in a little bit more features. This is where your tool will limit what you can design. I'm designing in Altera Quartus schematic entry tool.
Bill


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PostPosted: Sat Aug 28, 2021 2:21 am 
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cbmeeks wrote:
On this board, leave it to me to get something backwards. If I have a 50/50 chance, I will always pick the wrong one.

Yeah, I'm more or less the same way. That's why I create notes about these sorts of things. For example, my 0.1" Pin Headers note contains a digram similar to Graham's, but I also show the position of the guide protrusion and give pinouts looking in to both male and female connectors because I find it error-prone to mirror them in my head. (And I'm always very careful to consistently use "looking in" and label things that way because mirroring is my biggest source of confusion.)
Code:
        Looking Into
  Female Cable   Male Device
    ▼  ▂              ▂  ▼
    1 3 5 7        7 5 3 1      alternative numbering A1, A2, ...
    2 4 6 8        8 6 4 2      alternative numbering B1, B2....


Dr Jefyll wrote:
A double-ended cable like this can be handy.

That is totally brilliant! It's gone in my notes now, of course. (You'll even see that photograph there until the DMCA takedown notice arrives. :-))

BigDumbDinosaur wrote:
I've never bother with reverse polarity protection, opting instead arrange the power input so it can't be incorrectly connected. You really don't want that diode's forward drop and switching noise polluting Vcc.

I hadn't realized that diodes could pollute Vcc like that, but that's certainly good to know! I've been moving away from "dupont" pin headers and connectors and towards JST XH (for wire-to-board) and JST SM (for wire-to-wire) for power for the very reason that I have stopped trusting myself not to make mistakes with the dupont stuff.

plasmo wrote:
I had removed my factory scope probe tip and associted ground clip so long ago I don't even know where to find them. They are replaced with this probe in the picture where the black ground lead can go to a standard 25mil square wirewrap post and a sharp pointed pin header to probe around.

Can you show where and how exactly that's connected to the probe? It looks rather similar to just the standard probe tip when you remove the "pin clipper" cap from it. Except for the IC clip for ground, which is brilliant. I wonder where one can get the the kind of clip used on the ground wire to attach it to the probe so I can make one like that (without destroying one of my existing alligator clip ones).


Attachments:
probe-and-penny.jpg
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ground-clip.jpg
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PostPosted: Sat Aug 28, 2021 2:53 am 
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plasmo wrote:
Yes, I'm running out of resources, but there are many parameters I can tweek to squeeze in a little bit more features. This is where your tool will limit what you can design. I'm designing in Altera Quartus schematic entry tool.

Although WinCUPL is a bit buggy and not nearly as friendly as the Quartus software, it doesn't seem to get in the way of complex designs. The downside is Atmel never documented CUPL that well—Microchip hasn't done anything with it either, so there are some features that won't be readily apparent without experimentation. Fortunately, I ran across a somewhat-updated copy of LSI's original documentation from the 1990s, which does a better job of explaining some of CUPL's more exotic features.

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PostPosted: Sat Aug 28, 2021 9:44 am 
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BigDumbDinosaur wrote:
I've never bother with reverse polarity protection, opting instead arrange the power input so it can't be incorrectly connected. You really don't want that diode's forward drop and switching noise polluting Vcc.
Certainly the diode's forward drop needs consideration. But I'm drawing a blank on "switching noise polluting Vcc." WTH??? A diode wired for reverse polarity protection will conduct 100% of the time. In other words, it never switches (except when you swap the input polarity, which presumably happens when the power is off).

-- Jeff

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PostPosted: Sat Aug 28, 2021 11:52 am 
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The other option for reverse polarity protection is to put the diode across the supply line, reverse biased, then put a fuse in series with the power input. The diode doesn't conduct normally, but if you RP the board it conducts briefly and blows the fuse. For even more protection, you could put a thyristor crowbar in there as well in case you accidentally connect it to 12V instead of 5V...


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PostPosted: Sat Aug 28, 2021 7:00 pm 
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Dr Jefyll wrote:
...But I'm drawing a blank on "switching noise polluting Vcc."

Sorry, I was thinking of something else when I typed that.

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PostPosted: Sat Aug 28, 2021 7:01 pm 
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kernelthread wrote:
The other option for reverse polarity protection is to put the diode across the supply line, reverse biased, then put a fuse in series with the power input. The diode doesn't conduct normally, but if you RP the board it conducts briefly and blows the fuse. For even more protection, you could put a thyristor crowbar in there as well in case you accidentally connect it to 12V instead of 5V...

...or you could take the simple route and use a power input connector that can't be reversed.

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PostPosted: Sat Aug 28, 2021 11:06 pm 
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cjs wrote:
Can you show where and how exactly that's connected to the probe? It looks rather similar to just the standard probe tip when you remove the "pin clipper" cap from it. Except for the IC clip for ground, which is brilliant. I wonder where one can get the the kind of clip used on the ground wire to attach it to the probe so I can make one like that (without destroying one of my existing alligator clip ones).

I separated the 2-wire probe tip from the scope probe and took a picture of it to show how the 2-wire probe tip is installed on a scope probe.
Bill

Edit, I had the 2-wire probe tips for so long, I don't even remember where I got them.


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PostPosted: Sun Aug 29, 2021 12:52 am 
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Thanks for the suggestions!

You're right, that was a rats nest of antenna wires.
So the next thing I did was make a small plug-in board for the oscillator. I think the wires are now pretty short with one exception. I forgot to include VCC pins on those headers! So as you can see, I had to run VCC from another pin nearby. But the GND and OUT pin are very close to the board.

FYI, I'm messing around generating VGA so I put a 25.175MHz crystal into my board and I *think* I am diving it by four. Which should be 6.29375MHz but I'm not getting exactly that. Also, still some bounce in there but it does seem a little cleaner to me.

@BigDumbDinosaur

I tried to compile your suggestion but I'm getting an error in WINCUPL:

Code:
Name     1508Blink ;
PartNo   ATF1508AS ;
Date     8/27/2021 ;
Revision 01 ;
Designer Engineer ;
Company  Cecil Meeks ;
Assembly None ;
Location Soddy-Daisy, TN USA;
Device   f1508ispplcc84;   /** ATF1508AS with In-System programming **/

/***************** INPUT PINS *********************/
PIN 83   = GCLK;

/**************** OUTPUT PINS *********************/
PIN 27 = BLINK;

/**************** BURRIED STATES ******************/
Pinnode [51..48] = [S3..0];      /** 4-bit counter to divide global clock **/


/**************** Clock Divider ******************/
S3.t = [S2..0];
S2.t = [S1..0];
S1.t = S0;
S0.t = 'b'1;
[S3..0].ck = GCLK;
[S3..0].ce = 'b'1;

BLINK = ![S3..0];



ERROR:

Code:
Vector size mismatch:  S1
S2.t = [S1..0];

etc...


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Photo Aug 28, 8 33 34 PM.jpg [ 4.4 MiB | Viewed 1189 times ]
Photo Aug 28, 8 33 09 PM.jpg
Photo Aug 28, 8 33 09 PM.jpg [ 5.17 MiB | Viewed 1189 times ]
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PostPosted: Sun Aug 29, 2021 2:39 am 
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cbmeeks wrote:
FYI, I'm messing around generating VGA so I put a 25.175MHz crystal into my board and I *think* I am diving it by four. Which should be 6.29375MHz but I'm not getting exactly that.

Have you measured the output frequency of the oscillator ("crystal") to see if it's really 25.175 MHz? It would appear its actual frequency is 25.156 MHz (6.289 MHz × 4, going by what's being displayed on the 'scope), which is within 99.92 percent of nominal rating. For a typical 100 PPM part, which is likely what you have, 99.92 percent should be considered "in spec."

Quote:
Also, still some bounce in there but it does seem a little cleaner to me.

There's quite a bit of over/under shoot on the 'scope image. Is that the output from the CPLD?

Quote:
@BigDumbDinosaur

I tried to compile your suggestion but I'm getting an error in WINCUPL:

I just tried it now and got the same error. It worked when I test-compiled it the last time. This is one of the things about WinCUPL that is so damned aggravating. I really wish Microchip would fix their code.

In any case, in the PINNODE statement, you should remove the pin number references. In other words, Pinnode [51..48] = [S3..0]; should be written as Pinnode = [S3..0];. The fitter will automatically assign nodes S0-S3 to the appropriate type of buried logic. Your PINNODE declaration has the flops assigned to physical pins, which is something you should avoid doing in most cases.

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PostPosted: Sun Aug 29, 2021 3:54 am 
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BigDumbDinosaur wrote:
There's quite a bit of over/under shoot on the 'scope image. Is that the output from the CPLD?


Yes, that was directly touching the header pin out of the CPLD. No antenna on that one (other than the header pin and PCB trace).

GND was to a nearby GND pin that is ONLY using the supplied alligator clip.



BigDumbDinosaur wrote:
In any case, in the PINNODE statement, you should remove the pin number references. In other words, Pinnode [51..48] = [S3..0]; should be written as Pinnode = [S3..0];.



Hmm. Same error.

Code:
Name     1508Blink ;
PartNo   ATF1508AS ;
Date     8/27/2021 ;
Revision 01 ;
Designer Engineer ;
Company  Cecil Meeks ;
Assembly None ;
Location Soddy-Daisy, TN USA;
Device   f1508ispplcc84;   /** ATF1508AS with In-System programming **/

/***************** INPUT PINS *********************/
PIN 83   = GCLK;

/**************** OUTPUT PINS *********************/
PIN 27 = BLINK;

/**************** BURRIED STATES ******************/
Pinnode = [S3..0];      /** 4-bit counter to divide global clock **/


/**************** Clock Divider ******************/
S3.t = [S2..0];
S2.t = [S1..0];
S1.t = S0;
S0.t = 'b'1;
[S3..0].ck = GCLK;
[S3..0].ce = 'b'1;

BLINK = ![S3..0];



BigDumbDinosaur wrote:
Have you measured the output frequency of the oscillator ("crystal") to see if it's really 25.175 MHz?


Good question. I put the actual oscillator directly on the board (nothing else) using the closest connections I could. Even used the "springy thingy" on the probe. The scope shows it toggling between 25.000 MHz and 25.250 MHz (see attached). So I'm not so sure how accurate those oscillators are. In fact, I can't remember where I got them. I'm thinking eBay when most of the time, I get them from Mouser.

I'm going to play around with a few more oscillators on both the scope and the CPLD to see how accurate they are. I think my "mess of wires" will be somewhat OK if I try to keep them short. I've done VGA on breadboards before and it actually looked pretty good. Just not with a CPLD.

Thanks!


**EDIT**

OK, I put in a 14.000 MHz crystal into my CPLD with divide-by-four and get 3.497 MHz which is pretty close to the 3.5 MHz it should be. So 99.91% accurate. So I think it "works" but, obviously, frequency goes up then margin of error goes up.


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PostPosted: Sun Aug 29, 2021 6:32 am 
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cbmeeks wrote:
BigDumbDinosaur wrote:
In any case, in the PINNODE statement, you should remove the pin number references. In other words, Pinnode [51..48] = [S3..0]; should be written as Pinnode = [S3..0];.

Hmm. Same error.

Revert all your code to what you originally had and recompile to make sure it's okay—it should be, since that was what you were running before.

Once you've taken that step, try the PINNODE change I suggested and then examine the .LST file to see the results.

Quote:
BigDumbDinosaur wrote:
Have you measured the output frequency of the oscillator ("crystal") to see if it's really 25.175 MHz?

Good question. I put the actual oscillator directly on the board (nothing else) using the closest connections I could. Even used the "springy thingy" on the probe. The scope shows it toggling between 25.000 MHz and 25.250 MHz (see attached). So I'm not so sure how accurate those oscillators are. In fact, I can't remember where I got them. I'm thinking eBay when most of the time, I get them from Mouser.

What brand name oscillator is it?

Quote:
I'm going to play around with a few more oscillators on both the scope and the CPLD to see how accurate they are. I think my "mess of wires" will be somewhat OK if I try to keep them short. I've done VGA on breadboards before and it actually looked pretty good. Just not with a CPLD.

Since most of those oscillators are rated 100PPM for accuracy and long-term stability, the deviations you are seeing are within range.

Quote:
**EDIT**

OK, I put in a 14.000 MHz crystal into my CPLD with divide-by-four and get 3.497 MHz which is pretty close to the 3.5 MHz it should be. So 99.91% accurate. So I think it "works" but, obviously, frequency goes up then margin of error goes up.

Also a bit of an unknown is the accuracy of your scope's frequency-measuring functions. Does Rigol quote a spec for that?

If the deviation bothers you you could try a more precise oscillator. There are some 50PPM units in production and I recall having seen a 25PPM unit somewhere. However, the <0.1% deviation you are seeing shouldn't cause you any problems in getting your VGA functional.

As for that spiky-looking output, try inserting some series resistance in the signal path, with the resistor as physically close to the CPLD output pin as possible. 100 ohms would be a good start. Also, try adding property atmel {output_fast off }; to your CUPL source file. That statement will tell the fitter to slow down the CPLD's output slew rate.

Another trick would be to put two fast-recovery Schottky diodes (NXP BAT85 is a good choice, as it has a reverse recovery time of 4ns) in series, with the free anode of one connected to ground, the free cathode of the other connected to Vcc and the junction between the diodes connected to your CPLD's output. Make the leads as short as possible and mount the pair as physically close to the output pin as possible.

The upper Schottky (the one tied to Vcc) will conduct if the signal overshoots and exceeds the sum of Vcc and the diode's forward drop, which is typically around 300 millivolts. Thus the high-going spikes should be suppressed to around Vcc+.3. Similarly, the lower Schottky will conduct if the signal undershoots and goes below 300 millivolts.

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PostPosted: Sun Aug 29, 2021 5:52 pm 
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cbmeeks wrote:
The scope shows it toggling between 25.000 MHz and 25.250 MHz (see attached). So I'm not so sure how accurate those oscillators are. In fact, I can't remember where I got them. I'm thinking eBay when most of the time, I get them from Mouser.


It looks like your scope is a 1Gs/S digital scope, so you'll have sampling error of 1nS. 25.175MHz clock is sampled either 40 times or 39 times so that calculated out to 25.0MHz or 25.6MHz. Maybe your scope has an "average" mode where it can takes multiple samples of same waveform and calculate the average frequency?
Bill


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