Hot off the press, 8-Bit Guy made a video about the 6502. History, operation, application, comparison, etc. Interview with Bill Mensch also!

https://www.youtube.com/watch?v=acUH4lWe2NQ

Thanks!

Chad

Thanks, I added it to my watch later.

Very nice. Off-topic, I discovered that Dave and I have more in common than being 6502 fans ... he has the same hairstyle he had in 1975, and I also have the same hairstyle I had in 1975, except for the scraggly beard! I would have eagerly tried to grow an evil Mr. Spock beard from TOS "Mirror, Mirror" but my 9-year-old hormones were completely inadequate for the task. Today, that particular beard looks like more maintenance than I'm interested in investing. Instead, I just whip out the buzz clippers a couple times a year, whether I need it or not.

_________________
Got a kilobyte lying fallow in your 65xx's memory map? Sprinkle some VTL02C on it and see how it grows on you!

Mike B. (about me) (learning how to github)

Yup, very nicely condensed. Interestingly I hadn't realised the X16 would just work with a 65C816; I'm guessing it must just ignore the bank address and still use the X16's bank switching.

That's what I am guessing from what I was looking at yesterday in their latest documentation in GitHub, and their latest issues in the repo for their ROM. Either this latest ROM release, or the one just before, they added some limited 65816 support. Mostly around saving and restoring stack, because their BIOS/API is expecting stack at $100 (along with 8 bit register widths).

Yes, it allows taking advantage of the '816 benefits available in what in DOS used to be called a "small" memory model.

AFAIU, all that was required to make the socket '816 compatible was to provide a pull-up resister for Pin3, which is an /ABORT input pin in the 65816 and a legacy Phi0 output on the 65C02, so that it doesn't float low when the 65816 is swapped in.

Evidently a recent modification has been done to the Vera processor to allow faster moves of data between system memory and the memory internal to Vera, by allowing Data ports 0 and 1 to be written in consecutive clock cycles, so that 16bit data mode can be used for the copy.