The ideaFor quite some time I've been obsessed with something I'd call a "modern retro computer" (and I'm sure many of you are too). The "retro" in this name mostly refers to the low complexity of a system, meaning something that can be built and programmed from scratch by an individual – as in the old, good days. The "modern" means that there is zero focus on backward compatibility with the 8-bit machines from the past. That gives freedom in terms of choosing the hardware, and - most importantly - the right instruction set for the project. Although we all love our 65xx, and it's still being produced, it's not necessarily "modern", hence I think building such a system on RISC-V (32-bit) would make much more sense. The key reasons, in my opinion:
- modern, elegant ISA, that is quite good for manually implementing in ASM
- LLVM support - for writing software in almost any language
ProblemsUnfortunately, most home built machines lack software. Usually there is some Monitor (WozMon), some form of Basic, and - if the creator is ambitious enough - a port of Pong or Tetris. Plus a plethora of started and never-finished tiny OSes/kernels. I dare to hope that RISC-V and LLVM support would massively increase the chance of having more software being produced or ported to such a platform.
The major problem with existing RISC-V boards is that they offer overwhelmingly too much for a hobbyist - far beyond any notion of building anything from scratch. (It was interestingly pointed out, and discussed with Gordon in the
What's the most human-friendly instruction set? thread.)
And finally – there is a "conversion problem", that is both: sentiment and experience driven. "Oh, I've spent the last 20 years building my 6502 SBC and invested so much energy and time in it. I have no more energy left for switching to something new..."
Proposal / vision Based on the above I started thinking about the FPGA-built RISC-V core and board, that would be (some of you will laugh, I know)... pin-compatible with 65xx. What does it mean? Well - you stick such a processor board in the 65xx socket on your current home-built machine and voila - you have a working computer and - of course - no working software
That's perhaps an extreme example, but in general it exposes the following features:
- unlike most of RISC-V boards, we offer just a CPU, rather than a complete microcontroller with too many features
- a sane number of pins defines a platform for creating home-built computers on prototype-boards, and all the fun related to it. The pinout compatibility with 65816 is just a feature/idea, not necessarily a requirement. But the low'ish number, breadboard-friendly pins is a must.
So, as you see, I am not thinking about any closed platform (like, i.e. Commander X16), with defined architecture and components. I am thinking about making RISC-V available for electronics, DYI, ASM, OS enthusiasts as an alternative to the "old stuff". Some "reference" platform/software may emerge from such an idea - and I believe it would be great to have something like that - but it's not a goal per se.
DreamIf you read so far, and you find some sense in the idea, let me propose something, that could be a very nice challenge. I'm quite new to this Forum, but I've learned already that it's full of extremely knowledgeable and talented people, and I think I've seen here almost all possible and the most complicated and crazy projects. With one exception (but maybe I missed something) - a collective project
There is, obviously, a collective support - almost every question here is answered and those seeking help will certainly receive it. But how about actually doing something together and delivering it (means avoiding a risk of sinking in endless discussions)? I think that would be something and a great use of the energy and knowledge here! Hence - if you like what I've proposed here - I propose to do it together....
Some technicalitiesI wanted to avoid any solutionalization - my goal is to share with you the idea rather than any particular recipe, but here are some thoughts (TBD):
- Risc-V 32 bit, on FPGA, no internal clock, no ROM/RAM/IO devices,
- 8-bit data bus (means 4 cycles per instruction) for hardware simplicity
- 24-bit address bus (perhaps 16+8, so 65816 style) should be sufficient (who needs more than 16MB RAM in a homebuilt machine?)
- assumption the system will run in tens of MHz max, subject to the external clock and timings of circuitry
ReferencesI've learned here that any idea that comes to my mind has been already discussed at this Forum, or even built, so of course I looked for something similar. The only similar thing I found was
65RISC-V, proposed by Springfield last year. Although, in his proposal, he thought about RISC-V ISA extension, that would support 65xx ISA. Anyway, the idea of utilizing RISC-V as a friendly platform, was recalled here a number of times, that proves to me it may make sense to go this direction.
So, time for your thoughts....