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PostPosted: Thu Dec 01, 2022 10:56 pm 
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Joined: Mon Oct 03, 2022 9:44 pm
Posts: 26
I was inspired to make my own 8-Bit 6502-Based computer by Dan Grise, Ben Eater, Troy Schrapel, Rumbledethumps, Anders Nielsen The 8-Bit Guy on Youtube.

After a lot of research and studying 8-Bit computer hardware, I've finally came up with the following specifications for my 8-Bit Computer:

    Parts:
    CPU: W65C02S
    VIA: W65C22S
    ROM: Windbond W27C512-45Z 64k x 8
    SRAM: HM62256 32k x 8 (2x)
    VDP (Video Display Processor): TMS9918A
    VRAM (DRAM): MK4516N-15 16K x 1 (8x)

    Specs:
    Memory Space: 64k
    VRAM space: 64k
    Serial Port for plugging into a modern Computer to use as A terminal for: Keyboard and Sending 6502 Assembly into the Computer's ROM

After reading though the Data Manual for Texas Instruments Video Display Processors and asking for the schematics for Dan Grise's 8-Bit Computer, I have some questions. As I list the questions below, I will add details who exactly why I'm asking them. My questions are as follows:

    1: There is this datasheet and documents on how to replace the DRAM the TMS9918A VDP, with SRAM . However, While I was creating PCB layouts for the system, the SRAM chip and the 3 74HC574 Digital Flip Flop IC's make the PCB bigger and connecting the pins with traces became very cluttered and messy. that's why I'd rather use 8 smaller DRAM chips to sav on space and it would be easier to create traces for. I've asked Dan Grice on his YT video about his own 6502 SBC and he provided this GitHub link that contains the schematics for his project. If I want to use DRAM chips instead of an SRAM Chips, Can I still use the 74C14 Hex Trigger Inverter for the Row and Colom Addressing or is that Inverter only used for the SRAM setup?

    2: Also in Dan Grise's schematics, there is a page dedicated for the VPD and how 2 additional ICs are sued for the CSW (CPU to CPU Write Select) and CSR (CPU to VDP Read Select) Select Logic. is the Select Logic Circuitry specific to the SRAM setup?

    3: Also in Dan Grice's schematics, there is a page dedicated for the Video Read/Write logic. The circuit shown in that page uses a 74HC165 Shift Register, 74LS74 Dual D-Type Flip-Flop and a 74HC00 Quad 2-Input NAND gate. the Video Read Write circuits needs its own 10Mhz Clock? Why?

    4: Still on Dan's schematic page for the VDP, pins 39 and 40 are tied to a small 10Mhz Crystal Oscillator. Each Pin on the Crystal Oscillator is also tied to Ground? Why would those pins be conected to Ground?

That's all of the VDP related Questions I have for now. Any help and advice will be appreciated and thanked in Advanced!


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PostPosted: Fri Dec 02, 2022 12:41 am 
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Joined: Fri Apr 15, 2022 1:56 pm
Posts: 47
Location: San Antonio, TX, USA
PC Building Yoshi wrote:
I was inspired to make my own 8-Bit 6502-Based computer [...]

After reading though the Data Manual for Texas Instruments Video Display Processors and asking for the schematics for Dan Grise's 8-Bit Computer, I have some questions. As I list the questions below, I will add details who exactly why I'm asking them. My questions are as follows:
    1: There is this datasheet and documents on how to replace the DRAM the TMS9918A VDP, with SRAM . However, While I was creating PCB layouts for the system, the SRAM chip and the 3 74HC574 Digital Flip Flop IC's make the PCB bigger and connecting the pins with traces became very cluttered and messy. that's why I'd rather use 8 smaller DRAM chips to sav on space and it would be easier to create traces for. I've asked Dan Grice on his YT video about his own 6502 SBC and he provided this GitHub link that contains the schematics for his project. If I want to use DRAM chips instead of an SRAM Chips, Can I still use the 74C14 Hex Trigger Inverter for the Row and Colom Addressing or is that Inverter only used for the SRAM setup?
Take a look at the circuit diagram in figure 4-2 of the TMS9918A manual that you linked. It looks like there's no glue logic necessary for connecting the DRAM chips so you wouldn't need the inverter.
PC Building Yoshi wrote:
2: Also in Dan Grise's schematics, there is a page dedicated for the VPD and how 2 additional ICs are sued for the CSW (CPU to CPU Write Select) and CSR (CPU to VDP Read Select) Select Logic. is the Select Logic Circuitry specific to the SRAM setup?
No, you can see from the same circuit diagram that the CSR/CSR logic is not connected with the DRAM so you'll still need this.
PC Building Yoshi wrote:
3: Also in Dan Grice's schematics, there is a page dedicated for the Video Read/Write logic. The circuit shown in that page uses a 74HC165 Shift Register, 74LS74 Dual D-Type Flip-Flop and a 74HC00 Quad 2-Input NAND gate. the Video Read Write circuits needs its own 10Mhz Clock? Why?

The clock required for the VDP is tied to the timing requirements of the video display. Section 3.6 in the data manual describes this and specifies a 10.738635 MHz clock
PC Building Yoshi wrote:
4: Still on Dan's schematic page for the VDP, pins 39 and 40 are tied to a small 10Mhz Crystal Oscillator. Each Pin on the Crystal Oscillator is also tied to Ground? Why would those pins be conected to Ground?

They are tied to ground via capacitors. I'm not sure the motivation. The data sheet does not show the capacitors to ground so you might not need them.
PC Building Yoshi wrote:
That's all of the VDP related Questions I have for now. Any help and advice will be appreciated and thanked in Advanced!
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