6502.org Forum  Projects  Code  Documents  Tools  Forum
It is currently Tue Nov 12, 2024 3:33 pm

All times are UTC




Post new topic Reply to topic  [ 6 posts ] 
Author Message
PostPosted: Sun Nov 01, 2020 10:48 am 
Offline
User avatar

Joined: Sun Nov 01, 2020 10:36 am
Posts: 37
Location: Tatooine
Hi

A friend stated that the 6510 includes 256 bytes of static Ram, used as the Page Zero Ram.
His evidence is a document at http://6502.org/documents/datasheets/mos/mos_6510_mpu_nov_1982.pdf. Another document in the same directory (http://6502.org/documents/datasheets/mos/mos_6510_mpu.pdf) doesn't mention any included static Ram.
I found a forum post (http://forum.6502.org/viewtopic.php?f=1&t=4918) where all the 6510 are specified to have that static Ram included, and nobody disputed that.

What do you know about it? To me the first datasheet I linked (marked "preliminary") seems a datasheet of a 6508 with some corrections. The pinout even lacks the NMI pin.

Since the 6510 is a pretty common variant (being included in millions C64s) I think it would have been common knowledge about it, while this is almost never mentioned whenever there is a 6502/6510 list of differences.


Last edited by BB8 on Mon Nov 02, 2020 8:09 am, edited 1 time in total.

Top
 Profile  
Reply with quote  
PostPosted: Sun Nov 01, 2020 11:00 am 
Offline
User avatar

Joined: Thu Dec 11, 2008 1:28 pm
Posts: 10977
Location: England
Welcome! An interesting set of observations. I rather suspect kakemoms' list ("Overview of 6502-like cores, hard, soft, partial, overblown") would need to be updated, if definitive information could come to light.

256 bytes of RAM is physically rather large and would - to an approximation - double the cost of a chip. So it would only make sense in a microcontroller kind of product, to save having any external RAM. (I'm not sure when the term 'microcontroller' came into use.) Commodore might like to use such parts in peripherals, such as printers. But it would make no economic sense to add 64k of external RAM to a chip which has a very expensive 256 bytes already.

Numbering of parts is confusing: it will not be surprising to see the name number used for different parts, even though that goes against the grain. And as you note, a preliminary datasheet is only preliminary - the product might never appear, might be modified before appearing, or appear under a different name. A historian's eye is needed here.

Various teams like to decap and photograph chips: that will give a ground truth, including a measure of how physically large 256 bytes of RAM is, compared to a 6502 core. (If indeed such a chip has ever been photographed, or produced.)


Top
 Profile  
Reply with quote  
PostPosted: Sun Nov 01, 2020 2:40 pm 
Offline
User avatar

Joined: Sat Dec 01, 2018 1:53 pm
Posts: 727
Location: Tokyo, Japan
BB8 wrote:
A friend stated that the 6510 includes 256 bytes of static Ram, used as the Page Zero Ram.
He's evidence is a document at http://6502.org/documents/datasheets/mos/mos_6510_mpu_nov_1982.pdf. Another document in the same directory (http://6502.org/documents/datasheets/mos/mos_6510_mpu.pdf) doesn't mention any included static Ram.

I am pretty sure that the claim of having static RAM is a typo: the only place it appears in that first datasheet is in the features box on the first page; there's no mention of it elsewhere. You'd think that if the RAM were really there, they'd at least tell you the addresses to which it's mapped. Typically there would also be information about what happens on the external bus when internal RAM is accessed, details about how to disable the internal RAM, and so on. (For an example of this kind of thing, have a look at the Motorola 6802 datasheet. Page 1 tells you that the RAM is located at addresses $0000 through $007F, page 4 discusses onboard RAM timing, page 7 discusses data bus and required peripheral behaviour when internal RAM is accessed, and page 12 discusses the RE (RAM enable) pin.)

Further, 256 bytes rather than 254 would be a bit of a waste of circuitry if it were mapped into the zero page, since the first two zero page addresses are mapped to the PIA and cannot be used for RAM. (Well, there may be a trick that lets you use external RAM mapped to those addresses in certain ways, but it's certainly not a general purpose thing.)

_________________
Curt J. Sampson - github.com/0cjs


Top
 Profile  
Reply with quote  
PostPosted: Sun Nov 01, 2020 2:54 pm 
Offline

Joined: Thu Mar 12, 2020 10:04 pm
Posts: 704
Location: North Tejas
cjs wrote:
(For an example of this kind of thing, have a look at the Motorola 6802 datasheet. Page 1 tells you that the RAM is located at addresses $0000 through $007F, page 4 discusses onboard RAM timing, page 7 discusses data bus and required peripheral behaviour when internal RAM is accessed, and page 12 discusses the RE (RAM enable) pin.)


I have built small systems using a 6802 to avoid the need for external RAM and clock generator.

Your post brings up an interesting possibility: adding an external latch to control the RE pin, giving the ability to select between internal versus external memory at $00..$7F.


Top
 Profile  
Reply with quote  
PostPosted: Sun Nov 01, 2020 3:11 pm 
Offline
User avatar

Joined: Thu Dec 11, 2008 1:28 pm
Posts: 10977
Location: England
cjs wrote:
BB8 wrote:
A friend stated that the 6510 includes 256 bytes of static Ram, used as the Page Zero Ram.
He's evidence is a document at http://6502.org/documents/datasheets/mos/mos_6510_mpu_nov_1982.pdf. Another document in the same directory (http://6502.org/documents/datasheets/mos/mos_6510_mpu.pdf) doesn't mention any included static Ram.

I am pretty sure that the claim of having static RAM is a typo: the only place it appears in that first datasheet is in the features box on the first page; there's no mention of it elsewhere.


I wonder then if we just have a copy/paste error from the 6508 datasheet?
6508 MICROPROCESSOR WITH RAM AND I/O
which has the additional description:
Quote:
One full page (256 bytes) of RAM is located (on chip) concurrently at Page 0 and P agel .allowing Zero Page Addressing and stack operations with no additional RAM.

(Very much a microcontroller: one page of RAM for both ZP and stack won't be great for a general microprocessor.)


Top
 Profile  
Reply with quote  
PostPosted: Sun Nov 01, 2020 7:07 pm 
Offline

Joined: Thu Oct 29, 2015 8:07 am
Posts: 6
The 6510 (and the HMOS 8500) as used in the C64 does not have 256 bytes of static ram for zero page. It's a standard NMOS 6502 core with tristate address bus support and an I/O register at $00/$01. You can find a die shot here: https://siliconpr0n.org/archive/doku.ph ... r:mos:6510


Top
 Profile  
Reply with quote  
Display posts from previous:  Sort by  
Post new topic Reply to topic  [ 6 posts ] 

All times are UTC


Who is online

Users browsing this forum: No registered users and 16 guests


You cannot post new topics in this forum
You cannot reply to topics in this forum
You cannot edit your posts in this forum
You cannot delete your posts in this forum
You cannot post attachments in this forum

Search for:
Jump to: