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PostPosted: Thu Sep 03, 2020 12:43 pm 
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This article is not 6502 related, but it's an early 8-bit CPU from the 1970's, but I think this crowd will enjoy it. This is a fairly in-depth article about an HP processor that can't even add: http://www.righto.com/2020/09/inside-hp-nanoprocessor-high-speed.html. It could count, but not add. I think I read something about it sometimes relying on external hardware as a lookup table for addition when needed. The chip did not use RAM, everything was done in one of 8 registers and code was loaded from ROM.

Oh, and by the way, the article includes CPU die shots.


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PostPosted: Thu Sep 03, 2020 3:42 pm 
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Nice quote: "The Nanoprocessor designers wrote a timing comparison, estimating that the Nanoprocessor could count six times faster than the 6800 and handle interrupts over sixteen times faster. The proposal assumed a 5 MHz Nanoprocessor while the actual chip fell a bit short, running at 4 MHz. The projected cost of the Nanoprocessor was $15 per chip, compared to $360 for the Motorola 6800."

Also: "I came across one place in the code where it needs to add two BCD digits to form one byte. This was accomplished by a loop that decremented one number while incrementing the second. When the first number reached zero, the result was the sum. Thus, even without an ALU, addition is possible but slow."

I do like the idea of hooking up a digital watch chip and needing to output button presses and read back and decode 7 segment control lines.

We also read that an ALU and RAM access could be added as peripherals.

I enjoy all of Ken Shirriff's reverse-engineering posts! Be sure to read the footnotes and comments too. He has covered a few aspects of the 6502, as well as the z80 and 8080, in the past. Here some aspects of ARM are compared to 6502:
http://www.righto.com/2016/02/reverse-e ... ction.html

And here a pair of posts on the 6502's overflow flag:
http://www.righto.com/2013/01/a-small-p ... ained.html
http://www.righto.com/2012/12/the-6502- ... ained.html


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PostPosted: Fri Sep 04, 2020 12:45 am 
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Interesting article. Leaving out parts of the ALU seems like a common cost saving strategy.

On October 21, 1959 IBM introduced the 1620 Model I, it lacked a conventional ALU and arithmetic was done by memory table lookup. It's product code name was CADET, jokingly meaning "Can't Add, Doesn't Even Try". It was still legendary in the 1980's when I studied computer science as an example of an radical cost reduction by eliminating components.


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PostPosted: Fri Sep 04, 2020 2:18 am 
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Martin_H wrote:
Interesting article. Leaving out parts of the ALU seems like a common cost saving strategy.

On October 21, 1959 IBM introduced the 1620 Model I, it lacked a conventional ALU and arithmetic was done by memory table lookup. It's product code name was CADET, jokingly meaning "Can't Add, Doesn't Even Try". It was still legendary in the 1980's when I studied computer science as an example of an radical cost reduction by eliminating components.


Funny how you beat me to the CADET post... it's the first thing I thought of when I read the initial post. When I joined IBM in the 70's the older guys would still mention the CADET once in a while when talking shop in the break room. It was withdrawn from Marketing on November 19th, 1970. As with most IBM historical equipment, you can find lots of details about the 1620 as well:

https://www.ibm.com/ibm/history/exhibit ... P1620.html

As for the lack of a proper ALU, here's some details from the above link:

Quote:
Internal data representation

Self-checking, six-bit, binary-coded decimal.Four-bit numerical value (1-2-4-8)
Flag-bit for field and sign designation.
Check-bit to give odd parity check.

Direct conversion from card code to two-digit alphameric coding.
Processing speeds

Fixed point operations
Basic machine cycle was 21 microseconds. Time included the fetching of two factors and was the complete interval elapsed from one instruction to the next.

Addition or subtraction (5 digits) - 560 microseconds. A rate of 1,780 per second.
Multiplication (5 digits by 5 digits) - 4.96 milliseconds. A rate of 200 per second.
Division (5-digit quotient) with automatic divide feature - 16.86 milliseconds. A rate of 56 per second.
Logical decisions - 200 microseconds. A rate of 5,000 per second.
Data transmission of 5-digit fields - 360 microseconds. A rate of 2,800 per second.

Optional automatic floating point operations
When using this hardware feature, floating point numbers consisted of a variable length mantissa with a two digit exponent. So that the required degree of precision could be specified, the mantissa could vary from 2 to 100 digits in length and the exponent field could range from -99 to + 99.
The times listed are based on a two-digit exponent and an eight-digit mantissa. They include normalizing and access to two floating point fields.

Floating add or subtract — l.2 milliseconds.
Floating multiply — 12.5 milliseconds.
Floating divide — 41.7 milliseconds.
Components

IBM 1620 Central Processing Unit
Contains console, arithmetic and logical unit, and core storage.

Console

Visual display of machine check indicators, program registers and storage locations.
Control keys and switches for manual and semiautomatic control of computer operations.
Typewriter and typewriter release/start key for simultaneous release and start were included as part of the console. It functioned as a direct input-output device.

Arithmetic and logical unit

Two-address instruction format, 12 digits.
32 powerful commands — could be expanded to 47 with optional features.
Addition, subtraction and multiplication accomplished by automatic table lookup in core storage.
Division accomplished by available subroutine or by optional automatic divide feature.
Console switches and machine check indicators could be interrogated by the program.

Core storage

A basic system contained 20,000 digits of core storage.
Each digit position individually addressable by a five-digit address.
300 positions permanently assigned for use in arithmetic operations.



And to think that the 6502 was released in 1975.... less than 5 years after the 1620 was withdrawn.

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PostPosted: Fri Sep 04, 2020 3:19 am 
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A modern take that's somewhat related to this theme is the SERV RISC-V design, which has a 1-bit serial ALU in order to keep the gate count way low, while still supporting the ISA.

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PostPosted: Fri Sep 04, 2020 2:18 pm 
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White Flame wrote:
the SERV RISC-V design, which has a 1-bit serial ALU in order to keep the gate count way low
Whoa! I knew the 1802 microprocessor -- a product of the 1970's -- used a serial ALU, but I never would have expected to see a RISC-V done this way! Depending on one's objectives, I guess anything goes. :)

Martin_H wrote:
Leaving out parts of the ALU seems like a common cost saving strategy.
Back in the day I created and applied a design with no ALU at all! :mrgreen: For the curious among you, here are links to its description and to two threads on anycpu.org which mention this and some other unusual processors.

-- Jeff

One-bit Computing at 60 Hertz
Some Minimal Instruction Set CPUs
Quirky Chips - from Moto, Signetics and others.


Attachments:
3200 State machine big.gif
3200 State machine big.gif [ 23.53 KiB | Viewed 921 times ]

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