Some findings on Mitsubishi 7700 core and microcontrollers - it's a bit like an 816 but without the 6502 compatibility mode. Up to 25MHz. It retains m and x mode bits, has a prefix byte to bring a B accumulator into play, and includes multiplication and divide using another prefix byte. Both A and B are 16 bits and usable also byte sized.
(500 page user manual (MITSUBISHI 16-BIT SINGLE-CHIP MICROCOMPUTER 7700 FAMILY / 7700 SERIES 7702/7703 Group User's Manual) - gone from there, now found here. Or try here instead for a 344 page version)
http://www.alcyone.org.uk/ssm/7700sm.pdf (361 page software manual) (programmer's model page 11)

Then the 7900 (source code compatible) introduces 32 bit operations, 100 extra instructions, and 20-30% code size reduction. Has 4 direct page registers and a 32 bit accumulator E (concatenation of B and A.) Also RMPA, a vector product instruction.
https://www.renesas.com/sg/en/doc/produ ... 7900sm.pdf

Edit: see also previous threads

Overview of 6502-like cores, hard, soft, partial, overblown
Index of threads for improved 6502 and derived architectures

Edit: thanks to anonymous donor, added a link to the 512-page User's Manual.

I tried that one and got:

_________________
x86?  We ain't got no x86.  We don't NEED no stinking x86!

Thanks, I've adjusted the head post. (Would be fine to send this kind of thing as a PM!)

It's interesting to see how the 6502 gets extended. As well as new instructions Mitsubishi added an instruction queue to speed instruction loads. Rockwell extended their 6502 with Forth instructions as well as a quite nice banking system. Their modems ended up with a lot of ROM, sometimes in 128k chips, with 4 decoded address lines this gave an address range of 512k all in 8k banks. Software could also control a /2 or /4 speed selection for slower memories. This was probably important in their later chips that ran at about 35 MHz.

As far as I know Mitsubishi is the only manufacturer to use a prefix byte to extend the instruction set. Rockwell added multiply and multiply-accumulate, presumably for signal processing, but I think Mitsubishi has the only divide instruction?

All the improvements are for microcontroller use, there was never anything beyond the 65816 for general purpose computing, where caches and virtual memory would have become useful as well as a full maths co-processor or instructions. The MC68881 is normally connected to a 68000 bus, but it does have a memory mapped option that can be linked to the 6502 bus, so that can be considered a possible FPU for the 6502 line.

The 7900 is an interesting one. It looks like a simple extension, but the instruction encoding is entirely different. LDA immediate is 16, for example, not A9. That lets them assign the valuable one-byte encodings to the more common instructions, rather than having to fit their new ones in whatever space they can find.

And I like the multiple direct page registers! The direct page is split into four mini-pages of 64 bytes each, with the top two bits of the address saying which mini-page it is in. Each mini-page has its own 16 bit direct page register. If they're initialised to $0000, $0040, $0080, $00C0, it will look exactly like the 6502's zero page. But they can point anywhere (in the first bank) - you might have two pointing to RAM, one to a table of constants in ROM, and one to I/O, for example. That's a great idea.

The byte instructions are another improvement. You can leave the processor in 16 bit mode, and use different instructions to operate on 8 bit data. With the addition of 32 bit operations, that's a much more sensible approach. It's strange that they kept the mode bits, given that they've already thrown away binary compatibility.