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!IRQ is level-triggered, so if the interrupt handler doesn't take the source of the interrupt request away, an interrupt will occur again as soon as the Interrupt flag in the processor is set. In most cases that happens when RTI restores the flags from the stack but it can also happen when the interrupt handler executes CLI to allow nested interrupts. As long as !IRQ is asserted, no code outside the interrupt service routine is executed: the I flag gets set sometime during the RTI (or CLI) instruction so by the end of the last clock of the instruction that sets the I flag, the hardware is ready to handle the interrupt again, before starting execution of the next instruction. This makes it possible for multiple devices to generate an interrupt at the same time, and have all those devices (and BRK instructions) serviced by a single interrupt service routine.
By the way, !NMI is edge-triggered: when the level goes from high to low, a non-maskable interrupt is generated. No matter how long the !NMI input stays low, no new interrupt is generated until it goes from high to low again (nothing happens when it goes from low to high). This makes sense if you think about it: imagine if NMI would be level-triggered; that would mean that if the circuitry would hold the pin low for any amount of time, an interrupt would occur again immediately after the processor started handling the interrupt. That would keep happening until NMI would be deasserted, and the processor would be doing nothing except start the NMI handler over and over, and push return addresses and flags onto the stack if !NMI were level-triggered. However because it's edge-triggered, the interrupt happens only once and it's possible for hardware to prevent it from happening again by holding !NMI low.
===Jac
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