From another discussion:

I thought I'd bring it over here to a new thread.

Here's Tor's response from that other discussion:

And mine:

I found another source, with these phrases:





The web page is titled "The history of the ARM CPU" and declares as a footer:


Edit: first chapter available on the internet archive here.

Very interesting history! I'm still reading... I was never aware that it all sprouted from the Acorn.

That book is $93 used on Amazon.com!

Can one purchase an ARM cpu, with address and data bus pins or are they always internally mated to an interface protocol? They're very cheap... If not I guess that ARM core on opencores is worth looking at (just out of curiousity's sake)...

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65Org16:https://github.com/ElEctric-EyE/verilog-6502

In 1985 I visited Acorn in Cambridge and met the folks sat at the back of their office designing the RISC chip. At the time I didn't pay it much attention I was too busy trying to get my database package running multi-user over ECONET.

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Andrew Jacobs
6502 & PIC Stuff - http://www.obelisk.me.uk/
Cross-Platform 6502/65C02/65816 Macro Assembler - http://www.obelisk.me.uk/dev65/
Open Source Projects - https://github.com/andrew-jacobs

This interview about the Acorn 6502 kit has a lot of funny or interesting facts: http://speleotrove.com/acorn/acornWilson.html

(including the one about the guy who assembled his Acorn kit with glue to avoid heat-damage from soldering..)

Several of the other links you can find out there (e.g. this one) will mention that the Acorn System 1 was based on a Sophie Wilson-designed 6502-powered cow feeder..

From that same link about the ARM development:

-Tor

Now that is a real engineer!

Found another interesting piece on ARM ("Great Microprocessors of the Past and Present", cpushack.com):



There's a nice description of the architectural features and comparisons to other processors too. Summary:

Its been over 20 years since I read about this. What I remember is the 6502 requires other chips and ARM was designed to have the other chip components onboard. This is probably the part they forget to mention. I can't remember the particulars because it has been so long.

The 6502 wasn't fast enough for their graphical requirements so this is why they started their own design apart from licensing.

It sounds like you mean microcontrollers v. microprocessors. The 6502 by itself is a microprocessor. There have been various microcontrollers made with a 6502 inside them and then they have I/O and timers and memory etc. all on the same IC. The 6502 licensee that's running one over 200MHz is definitely doing this. I don't think you could get anything to run on a 6502-type bus at that speed if it were taken offboard, ie, outside the chip that has the processor in it. The timings are too tight for that. Maybe it could be done with BGAs and .002" traces and super-tight layout on a thin multilayer board with parts on both side and blind and burried vias. It would be fun but not be economically feasible. Unfortunately there are almost no general-purpose, off-the-shelf, 6502-based microcontrollers available today. WDC's 65134 and, with the '816, the 65265, are nice, but they don't allow you to program their ROM at your workbench, and, if you have outboard memory, you forfeit a lot of the I/O pins.

You precisely described why I built POC as a discrete MPU design. I didn't want to contend with someone else's notion on how it should work, or struggle with reconciling RAM requirements with available I/O paths.

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x86?  We ain't got no x86.  We don't NEED no stinking x86!

There are certainly some similarities in the instruction set design of the 6502 and ARM - whether the latter was 'inspired' by the former remains to be seen, but I'd be surprised if there wasn't at least a little influence.

The arithmetic flags (NVZC) are the same in each, and also used in exactly the same ways, for example:

• bitwise operations only affect N and Z, and leave the others untouched.
• C and V flags are used and set identically by adds/subtracts in both CPUs.
• Subtract operations use C as 'borrow' in both CPUs.

For what it's worth, the above is not true of (for example) the Z80.

Then - it's a small point - but the instruction set uses similar nomenclature to that of the 6502, for example:

• # to indicate an immediate operand
• EOR rather than XOR.
• Shifts called ASL, LSR and ROR (as well as ASR).
• Three character mnemonics for nearly everything (including the somewhat contrived ORR), like the 6502.
• Condition codes use 6502 type nomenclature, e.g. NE rather than NZ (as in BNE)

Either way, the ARM is a work of genius in terms of fitting such a rich symmetrical instruction set into a 32 bit word. It's a shame that more recent versions have lost this symmetry and become far more complicated - but that's progress...

slightly off topic, but here's a pdf describing thumb2, ARM's second attempt to create a compact 16-bit instruction set, which seems to have got significantly better tradeoff of performance versus density:

For example, there's a multi-predication instruction (because there's no room for bits in every instruction) to setup the next four instructions to be conditional in various ways. Not sure how that plays with interrupts.

There have been several usenet threads that touched on this topic.

I vaguely recall a post by Sophie Wilson, something to the effect
of them simulating the ARM across several BBC micros in BBC Basic.