The Vector Pull active low output indicates that a vector location is being addressed during an interrupt
sequence. VPB is low during the last two interrupt sequence cycles, during which time the processor loads
the PC with the interrupt handler vector location. The VPB signal may be used to select and prioritize
interrupts from several sources by modifying the vector addresses.

Does anyone know if VPB is asserted (i.e. pulled low as it is a negated output) during the fetch of the vector of RESET as well or is it only for the interrupts. The manual is not very clear on that

I added some "debugging" to my AVR IML project and could verify that VPB is asserted (pulled low) also when fetching the RESET vector. See my other thread http://forum.6502.org/viewtopic.php?f=4&t=3374&p=39282#p39282

Yes indeed. But how many designs make use of VPB. In my case it's in may favor, I just wanted to have a save way to recognize when the 65816 reads the reset vector instead of meticulously counting cycles. Just going through PHI2 cycles and look for VPB is much easier and as it seems possible.