Hi Ed,
BigEd wrote:
It was Brian and Barry Silverman who wrote the simulation engine, I think. Greg James did the deprocessing and polygon capture and possibly some of the JavaScript too - all three were involved in the debugging and bringup. I did some of the later work in refining and extending the user interface, and at that time we also improved the performance.
I discussed last year. There are many ways to improve the performance so that logical data such as AND, OR, NOT, etc can be used to replace "IF THEN" statement due to avoided branch misprediction. I have not written my code yet, but it is on my draft.
BigEd wrote:
I'm not aware of there being eight iterators. The simulation engine is iterative - it loops until convergence, for some maximum number of iterations. I think the worst case is in the region of 20-30 iterations for a clock phase, depending on what the chip is doing.
First iterations will read all 3,510 transistors and update 1,704 nodes. Sometimes, second iteration or more are needed in order to update some nodes before next half cycle repeats the loop.
BigEd wrote:
I know the simulation engine needed some fine-tuning to ensure convergence - the algorithm is inherited from the 4004 model which is written in Logo. I think perhaps there are fewer difficult circuits in the 4004. There was more fine-tuning needed when we tackled the 6800, which has enhancement-mode pullups and some different transistor circuits.
The 'bb' data is the bounding box data, used to highlight a transistor when you click on it. We might have thought at one point to use the bounding box as a proxy for drive strength, but we never did. (It wouldn't model serpentine transistors very well.)
It will be nice to add second version of Visual 6502 to the Visual 6502's website in JavaScript language. The Visual 6502 is filled with the number of transistor's symbols in perfect alignment. For example, dark red pull-up transistor (depletion mode) will be light red when the power is turned on prior reseting MPU 6502. The dark red pull-up and green pull-down transistors (enhancement mode) will be light red and light green when the gate is set high and back to dark red and dark green transistor again when the gate is set low.
You have seen my drawing schematic. The image will look nicer with full details. No more original photo of MPU 6502. The number of transistor's symbol will do better.
What do you think? Will the designers of Visual 6502 accept my project and they add it to their website in the future?
Take care,
Bryan Parkoff