I've looked at diagrams and some articles but is there something I'm missing? is there somwhere where this information is? I think there's a video somewhere but I couldnt find it.

Are you looking for hardware, or software, or the combination (as in trying to get into it fresh)? See if there's something at http://6502.org/documents/books/ that you like.

I will probably move this topic to the "Newbies" section later.

Edit: If you mean the insides of the processor itself, as in individual transistors and gates, see http://www.visual6502.org/ .

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http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

The visual6502 project is "how the 6502 works" taken to extremes.

(edit: ...and sniped by Garth's edit!)

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WFDis Interactive 6502 Disassembler
AcheronVM: A Reconfigurable 16-bit Virtual CPU for the 6502 Microprocessor

Ok thanks! I was hoping to design a cpu on a logic simulator that's compatable with 6502 asm, but since I still dont quite understand how the 6502 PLA works I was thinking of using a rom where part of the address is the timing, part of it is the opcode, and part is for interrupts, and the address lanes will be shared with multiple roms for the selects of different parts, or if it would work fine to use a decoder to select one part at a time from tge output of the rom or even have the opcode and timing be directly attached to the decoder. don't know if there's a better way to learn this

Ok, no moving this to "Newbies"!

I expect visual6502 will be the ticket. One of the majors on that project is our own BigEd here on this forum.

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

in your opinion is this a dumb way to learn how processors work?

If you can read verilog, I think it will be easier to understand my core https://github.com/Arlet/verilog-6502 than to understand visual6502. Even if you don't know verilog, it's probably still easier to understand.

Of course, there's a big difference between my project and a real 6502 in terms of all the details, but they also have a lot in common, and I've tried to stay reasonably close to the 6502 design whenever it was possible.

Not at all-- I just meant that you are obviously beyond what I originally thought from your title and first post in this topic. I'm glad there are those like yourself who take an interest in the internal design details. Understanding them is not a prerequisite for doing good hardware and/or software design using an existing processor; but it is for improving the processor.

_________________
http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

Hi gnawzie, and welcome!

If you really want to understand the internals of the 6502, see first Donald Hanson's block diagram, and then Michael Stiel's presentation on 6502, informed by the visual6502 work: Reverse Engineering the MOS 6502 CPU [27C3]
We've put various resources and links into the visual6502 wiki, so explore that too.

Building a CPU using a very wide microcode implemented with ROMs is certainly feasible, and you'll learn a lot from it. But an exact copy of the 6502 isn't necessarily best, because you copy some complex and incidental decisions made by the original MOS design team.

It's probably worth looking at the design or implementation of other minimal or simple CPUs. Some resources:
- Bruce Jacob's RiSC-16: http://www.eng.umd.edu/~blj/RiSC/
- Steve Chamberlin's Tiny CPU: http://www.bigmessowires.com/cpu-in-a-cpld/
- Dieter Mueller's no6502: http://www.6502.org/users/dieter/m02/m02.htm
- Ruud Baltissen's ttl6502: http://www.baltissen.org/newhtm/ttl6502.htm
(My point here is not "this has all been done before" but more "here are some ways this kind of project can be tackled")

Arlet has a point: many implementations these days are inside programmable logic chips, so learning to read (and eventually write) Verilog will open up more possibilities. But I do think a detailed block diagram is also an asset: it's the way my brain works, at least. If you can do a paper design, there are then several ways to implement it.

A big advantage of Verilog (or VHDL) is that you can write it and then simulate it - you don't need to build hardware to see whether your ideas are heading the right direction. In a simulation you can trace any signal and even print out values, to debug your ideas. All the tools are free, or no-cost.

But it's also true that you can tie yourself in knots in Verilog (probably you can do the same on a breadboard!) so having clear diagrams is always going to help. In Verilog you must stick to a small set of idioms to get reliable results: it's not a chip design language but a general purpose simulator-building language, and you don't want or need that generality.

Cheers
Ed

Indeed. It's quite possible to make a design that's both faster and simpler, using modern hardware and tools.


Also, the simulations are very exact. You can first spend a few weeks on the design and simulations, and test that everything is working, and then have it basically run first time right on actual hardware.