While reading away in the documentation here and other sites, I came up with two questions, which a search doesn't seem to offer answers to:

First, in the (excellent) 6502 Primer by Garth Wilson, there is section on "Mystery Pins" (http://wilsonminesco.com/6502primer/MysteryPins.html) that states you should pull BE up through a 3.3 kOhm resistor, but just connect SOB directly to 5V. Should SOB get a resistor, too, or is it part of the mystery that you don't need that one extra part?

Second, the ACIA seems to need a 1.8432 MHz clock input. I see that some people (for example, Scott Chidester at http://chidesters.org/scott/meadow/Meadow_6502_SBC_User_Doc.html) use a separate 1 MHz clock for the CPU itself. Is there any reason I can't just use the 1.8432 signal for the WDC 65c02 as well, except that it's a strange number for a microprocessor speed?

Thanks again for all the help!
Y, Scot

As long as the rest of the components can handle the extra speed (and as long as you don't mind the strange number ) then go ahead and use the 1.8432 signal for the WDC 65c02 as well.

Neither of those pins absolutely needs a resistor -- SOB and BE can both be directly tied high. But I can think of two reasons the resistor might be worthwhile.

• the resistor makes it easy to pull BE low during troubleshooting. That would tri-state the bus, making it easier to check for shorts on the bus lines.
• On their 'c02 and 'c816, WDC uses pin 36 as an input to control BE. But other manufacturers may assign pin 36 in different ways. A problem would arise if that pin were an output, because of course you're not supposed to tie unused outputs high or low!! The resistor would prevent excessive current if a non-WDC cpu were inserted in the socket. (Having said that, I'm not aware of any 65xx CPU that has an output there. Other than WDC's products, I think most 65xx CPU's have a No Connect on pin 36. BTW this pin numbers refer to the DIP version, not the chip in the miniature PLCC package.)

Maybe Garth will have something to add. His (excellent) 6502 Primer explains a lot but in this case he maybe omitted the extra details because they seemed more confusing and intimidating than helpful.

cheers,
Jeff

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In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html

I should look into it. I may have had a reason I don't remember at the moment. I wrote a lot of that material over ten years ago and just last year got it posted. I have seen times however that "NC" pins are used in testing at the factory and that the user is not to connect them, IOW, it's not just a convenient place to take advantage for a free via in a dense PC board for example (unless you cut the pin off the IC before putting it in the board). If it really were a test output on another manufacturer's part, then you definitely don't want it tied directly to Vdd or ground.

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http://WilsonMinesCo.com/ lots of 6502 resources
The "second front page" is http://wilsonminesco.com/links.html .
What's an additional VIA among friends, anyhow?

In my Parallel Video Board project I use a synchronous RAM, that the datasheet very specifically says 'NC = not connected to die', which is a good thing because when designing the board layout, I routed other signals that went through the 'NC' pins. It's a surface mount device, so there's no room to go in-between the pins.

Not sure about the WDC65C02 either. Their Datasheet needs attention!

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65Org16:https://github.com/ElEctric-EyE/verilog-6502

Good point. It may or may not be OK to do that. Sometimes No Connect means DO NOT Connect -- and the doc is explicit on that point.

Yes, it's good to be explicit. In this case the message is, yes go ahead and use this pin for a via! But in cases where "NC" is all she wrote, you can't be sure (and in that way a resistor makes sense).

One minor point in favor of using a round figure like 1 MHz is that it's slightly easier to calculate time delays. A software timer measures time according to the delay of the instructions in its program, so that's based on the CPU clock. And some hardware timers (like those in the 6522 VIA) also employ the CPU clock as a time base. In either case there's usually some arithmetic to obtain a specified delay. For a human being it's nicer if you can assume 1 CPU cycle = 1 microsecond, for example, rather than (roughly) 542 nanoseconds (the cycle time at 1.84 MHz).

Edit: separate clocks might also make sense simply because the other device -- the ACIA or whatever -- needs or is capable of benefiting from a frequency that's substantially higher than the CPU can handle. Or vice versa.

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In 1988 my 65C02 got six new registers and 44 new full-speed instructions!
https://laughtonelectronics.com/Arcana/ ... mmary.html

Thanks, guys. I'm slowly drawing up lists of which pin of which chip needs to be connected just how. I think I'll be color-coding the wires .

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x86?  We ain't got no x86.  We don't NEED no stinking x86!