Does the processor have a good ground connection?
Do you have a clean RST signal? The NMOS 6502 did not have a Schmitt-trigger RST\ input like the 65c02 does, so you need a clean edge with no bounce. The RST\ line cannot come up slowly as with an RC.
How's the clock source? Again, the NMOS 6502 did not have an on-board oscillator, and its clock input was more critical than that of the 65c02.
When the processor comes out of reset, it reads the address of the RST routine from $FFFC and FFFD, meaning most (but not all) of the address lines will be high. The RST\ line needs to be held low at least seven clock cycles after the power and clock are stable, but the NMOS had a problem caused by internal heating if the RST\ line was held low more than about a tenth of a second, meaning you have to put a timer on it instead of just debouncing a button.
3.8V is plenty high to qualify for a logic 1, and that's probably all you'll get from an NMOS 6502. The CMOS one puts out nearly 5V.
Obviously I recommend the CMOS version (65c02) for any new projects. It's not just about power consumption. The CMOS one fixed all the bugs of the NMOS one, added a few nice features, and added more instructions and addressing modes.
Note the correct spelling of breadboarded.
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