Hi,
Having sometime ago upgraded an old nmos6502 2MHz system to a 4MHz system utilising an R65c02 and the matching 65c22 via and finding no problems at all, i recently decided to see if i could utilise a WDC65c02 and it's matching 14MHz 65c22 part in order to increase the speed to 8MHz. My ram is 70ns access-time and the rom is 90ns. I utilise a dallas-1813-10 for the power-up reset and a 4MHz oscillator module at present for the clock signal. I was under the impression that so long as i tied the BE-signal pin to Vcc via a 4k7 resister and left the VP and ML pins to no-connection, the WDC65c02 would run the program in the normal manner at the 4MHz clock-speed. However, this does not appear to be the case !.........For some reason, the cpu does not get the reset vector from the top of the rom and instead starts to run the code from a different part of the program rom. I am at a loss to understand this. Am i missing something here ? If so, can someone please put me out of my misery by enlightening me.
Stebra.

Did you open the connection on pin 1 from ground? The WDC part has a VPB output on pin 1. This may be causing some trouble.

Daryl

Yes.....Daryl..........I lifted the pin from the socket to ensure a no-connection !!

Did you plug in the WDC 65C22 also? If so, you could try putting your original 65C22 back in and trying that.

When it executes code from somewhere else, is it doing so at the same location, or are the results random?

Does your system use multiple IRQ's, or any IRQ's?

Daryl

Hi Daryl,
Don't matter what 65c22 i use, it's still the same result. I don't use the NMI, it's tied high. I use the IRQ for the timer interrupt only. The cpu seems to always default to the same location in the code everytime. The software is aboard 3 eproms and decoded by a 74ls42. The active low output selecting the correct CS line on the appropriate chip. It cannot somehow be getting the correct logic-1 on A13,A14 and A15 in order to get the correct reset vector to point to the correct start of the code.
Comoletely stumped !!
If someone is going to make a fast 65c02, why cannot they make it so it's 100% compatible ?!
Regards.

One last thought, do you have a reset switch wired with the DS1813?

If not, try to manually ground the reset pin on the CPU and see if that helps. If you do have a switch, and it doesn't help, then purhaps try a 1 or 2 MHz oscillator, or change the current 4MHZ for a different one.

Beyond that, you would need a logic analyser and/or scope to try to figure out what is happening.

Daryl

Because the laws of physics prevents it. The faster the signals, the faster the slew, which means the higher the frequencies of RF it generates, which means the more adjacent traces act like receiving antennas.

I am willing to bet a slice of pizza that your problem is cross-talk on the bus, along with a slow slew rate on the phi-2 clock input. The WDC65C02 chip MUST have 5ns or faster slew on phi-2. No exceptions. To do otherwise, even if you're running it at 1 cycle per second, will result in unpredictable CPU behavior. I know -- I learned this lesson the hard way.

OK Daryl,........Thank's for the advice. Can you point me in the right direction as regards obtaining the fast TTL oscillator modules ?
Regards