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 Post subject: Contributing to 6502.org
PostPosted: Sun Nov 05, 2006 9:12 pm 
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Joined: Sun Nov 05, 2006 8:57 pm
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Hi forum folks,

I have developed a 6502 simulator with some system peripherals(console, uart, timers). Actually, the 6502 emulator part is only a side-project of my main goal, 8-bit cpu in vhdl.

Month or two ago i contacted the webmaster of 6502.org in hope i could publish my work so far at the site. I got no ansver. I used the e-mail address at the index page. So, should i try some other channel? If so, what?

Regards

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PostPosted: Sun Nov 05, 2006 10:33 pm 
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leegoukko wrote:
Hi forum folks,

I have developed a 6502 simulator with some system peripherals(console, uart, timers). Actually, the 6502 emulator part is only a side-project of my main goal, 8-bit cpu in vhdl.

Month or two ago i contacted the webmaster of 6502.org in hope i could publish my work so far at the site. I got no ansver. I used the e-mail address at the index page. So, should i try some other channel? If so, what?

Regards


So far, with very few exceptions, most "contributed content" on this site is in the form of links to people's webpages. In other words, 6502.org has a very small storage footprint. It also helps reinforce the idea that said content is the property of its respective authors, and not of 6502.org.

I think it's best if you make a presentable website to host your project with, then send Mike a note giving the URL to the project, a brief description, and how you think it should be categoried on the website.

I mention this because my personal Kestrel project has a link to it which I never asked for -- it just sort of happened. Meanwhile, other contributors who were a bit more pushy tended to not get anything published.

Speaking of which, I need to ask Mike to update the link to the Kestrel page. The Kestrel 1p3 link he provides on the Projects page is out of date, and leads to a non-existant page. The new page location is:

http://www.falvotech.com/content/kestrel

Click Navigate this site... to access other parts of the site.


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PostPosted: Mon Nov 06, 2006 9:32 am 
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kc5tja wrote:

So far, with very few exceptions, most "contributed content" on this site is in the form of links to people's webpages. In other words, 6502.org has a very small storage footprint. It also helps reinforce the idea that said content is the property of its respective authors, and not of 6502.org.

I think it's best if you make a presentable website to host your project with, then send Mike a note giving the URL to the project, a brief description, and how you think it should be categoried on the website.



Keeping packets at my site and publishing the URL at 6502.org was my original idea. Then i noticed that 6502.org hosts at least couple of binary packets. Which is good in case when the author's site is inaccessible. I also have two reproduced datasheets(cia6526 and crtc6545) in pdf-format which i really want to remove from my site. There might be some legal issues with them but in that case, i just remove them.

I'm not pushy or anything. I'm only wondering why my contacting didn't get through.

URL to the stuff is http://www.surffi.net/~allu/main/index.php?Emulators#sim6502

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PostPosted: Mon Nov 06, 2006 1:38 pm 
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Location: near Heidelberg, Germany
Mike is pretty busy. He checks the 6502.org mailbox only when time permits. I just got my pages updated (hosted on http://www.6502.org/users/andre ) yesterday.

Andre


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PostPosted: Mon Nov 06, 2006 1:41 pm 
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Location: near Heidelberg, Germany
Hi, I am very interested in the VHDL core. What's the status?

Thanks
Andre


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PostPosted: Mon Nov 06, 2006 3:12 pm 
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fachat wrote:
Hi, I am very interested in the VHDL core. What's the status?

Thanks
Andre


Very early, only proof of concept. ALU is missing but (almost)all bus actions are there. Interrupt and halt features are missing. It already runs the test programs in simulator. And btw, it is not 6502 compatible. Although, very similar in design. For example, true 8-bit design, instructions take 2-5 cycles to execute, the cpu accesses memory at every cycle and so on. The cpu has four 8-bit data registers, mainly used for arithmetic operations, and two 16-bit address registers for memory accesses. Other registers are SP, PC and CC. Current implementation is fully table driven, kind of microcode. I use emulator written in C to generate vhdl tables. However, my future plan is to reduce relatively large tables and hard code some of the processes, maybe all.

And Andre, your projects has been a great inspiration for me, thanks.

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PostPosted: Mon Nov 06, 2006 3:45 pm 
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Quote:
And Andre, your projects has been a great inspiration for me, thanks.


Many thanks. Over the next year or so I plan to go way beyond: Ethernet, USB, maybe SD-Card, a 65816 CPU board (clocked with 8 times the bus frequency, i.e. 8 or 16MHz). The year after that maybe a VHDL core :-)

Andre


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PostPosted: Tue Nov 07, 2006 4:32 am 
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leegoukko wrote:

A credit for the SYM BASIC disassembly would be nice.

Lee.


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PostPosted: Tue Nov 07, 2006 9:35 am 
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leeeeee wrote:
leegoukko wrote:

A credit for the SYM BASIC disassembly would be nice.

Lee.


Sorry, i will include readme.txt to the next release. Until then you will be credited at my site.

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PostPosted: Wed Dec 20, 2006 12:26 pm 
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There are actually quite a few 6502 simulators and assemblers around. This includes simulators originating from the time when 6502 was "main stream" and which have been heavily used in the past for professional 6502 software development and have been proven to be 100% accurate and reliable. Although "home made" simulators/assemblers are of great interest for the developer himself they in certainly in most cases not better then the already existing ones and I can well understand that Mike is restrictive in including such new material to the WEB page.

I also tried without success to convince Mike to include a contribution of myself to the WEB page. But in my case it was a "hybrid simulator" with a concept that to my knowledge is completely new. The original idea was to find a method to step through a 6502 program in ROM where no BRK instructions can be inserted. Similar systems based on special hardware functions have been developed in the past, for example by generating hardware interrupts with a timing such that each time the program is started only one instruction is executed (I used such an Intel development system once). My idea was to make it all in software. For this the instructions are moved one after another from ROM to RAM where they are executed. This means that all branching instructions, JMP, JSR, RTS etc have to be "simulated" on the 6502 system itself while other instructions are executed normally by the 6502. This was all running on a CBM2001 (PET).

My new "user friendly" version of this is to use a PC connected to the 6502 system via the parallel port connected to the VIA chip. For this PC/6502 system I also made a similar "RAM mode". Here the "simulation" of the branching instructions, JMP, JSR, RTS is made on the PC that first inserts a temporary BRK instructions in the right place in RAM and then starts the 6502 program, all fully automatica. Also the original "ROM" mode based on a simulation of the program counter running on the 6502 system itself is supported over the PC. In both modes the resulting contents of all registers and the stack after having reached the "break-point" is displayed on the PC screen! I also have a self-written 6502 assembler/disassembler running on the PC that has the advantage that it is completely integrated with the rest of the development system. The 6502 programs (and all other data) are stored on the PC hard disk from which it is loaded to the RAM of the 6502 system via the interface. This means for example that for my CBM system I do not need any mass storage at all, no floppies and no cassettes.

The largest advantage of such a "hybrid simulation" relative a classical PC simulation is that there is no need to simulate any periphericals, they are simply used as they are. In this sense it is really an "emulation" using the actual hardware!


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PostPosted: Wed Jan 10, 2007 5:46 pm 
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Location: Sunny So Cal
Mats, I developed something similar independently of yours, a project I'd played around with for years and around 2002 finally wrote into code. This was a KIM-1 emulator for the C64, and you can find it here:

http://www.floodgap.com/retrobits/kim-1/

Like your PET code, it abstracted all branching instructions, but this code also abstracts all instructions, period, and memory access. Thus the entire virtual machine is truly virtual. Speed is clearly a problem on a 1MHz 6502 trying to emulate a 1MHz 6502 -- it runs at roughly 1/50th the speed -- but it uses some tricks such as distilling instructions into pre-checked immediate instructions to get flags set for free, and this speeds it up relative to, say, a Z80 trying to do the same thing where more code must be added to emulate the behaviour.

The nice thing about this approach, though, is that it's fully trappable. The virtual 6502 is always reined in, so if you try to execute an $02, the virtual machine will nail it instead of crashing. Similarly, there's no contention for zero page because all memory access is trapped and stored somewhere safe.

The latest version was finished a few weeks ago, which speeds up the core and adds some luxury improvements.


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