Aaendi wrote:
Even though the 6502 was supposed to be the original RISC CPU...
It was not supposed to be, and it was not. Much as I enjoy my little joke about the 6502 being "a RISC CPU with one register," there are several issues with that.
1. "RISC" wasn't even a concept until 1980, or perhaps 1979 or late 1978 in unpublished work. That's years after the 6502.
2. RISC is distinguished from CISC, and arguably it was the VAX-11 (announced in '77, two years after the 6502 introduction) that provided the CISC standard of comparison, with all the extra, specialised instructions it added over the PDP-11.
3. RISC focuses on register-to-register operations, with registers being generic. The 6502 is very much a memory-oriented processor, even more than than 8080. For example, the 8080, while operations tend to focus on the accumulator, is generic in the counterparty register: you can do things like `XRA A` (`XOR A,A` in Z80 mnemonics) which is simply something you can't do in the 6502. This was also quite efficient; `XRA A`/`XOR A,A` is the standard idiom for loading 0 into the accumulator, taking only one one byte and M-cycle (four T-cycles, IIRC, the minimum), whereas the 6502 must do `LDA #0`, taking two bytes and two cycles.
4. It's clear from much of the 6502 instruction coding that reducing the number of instructions was not about being RISC, but simply saving transistors. For example, it would be great to have a `BRA` instruction as the 6800 did (so great that they added it back in the 65C02!), but with a hard limit of 8 relative branch instructions to keep the coding of the particular branch instruction to three bits, there simply wasn't room for it. (Consider which branch instruction you would remove to make room for `BRA`, and why.)
Quote:
For example, getting rid of indirect addressing modes, but using 16-bit address registers instead. I do how much that would've change the overall transistor count.
Well, using 16-bit address registers instead of the zero page as pseudo-registers is still indirect addressing. And my guess is that it would have increased the transistor count by rather a bit, given that they felt it was worthwhile even to make the stack pointer just 8 bits, unlike the 6502's inspiration, the 6800.
And you can't even just change the X register to be 16 bits instead of having indirect ZP indexed addressing; one of the improvements over the 6800 (which had a 16-bit X register) made by the 6502 design team was to essentially have multiple (inefficient, because zero-page) index registers. If you've ever programmed a 6800, you'll well remember how inefficient it was to do things (particularly copies) with only one index register, and the additional pain caused to program design from not being able to push it on to the stack.
The 6502 has a
marvelously efficient design. It's not easily appreciated until you first have programmed both it and the 6800, and second have gained some understanding of how the 6502 works internally. It took me many, many years to start to properly appreciate it.
Login
Register
FAQ
Search
