ACIA Works for 65c02, not for 65c816 with same settings?

[Jmstein7]

Dr Jefyll wrote:

In the lead post you said, "I've been tinkering and testing with my ACIAs (65c51 and LIV2's RTL equivalent)," which sounds as if you meant a real, physical 65c51 as well as the soft core.

Edit: I see you've posted again, but my advice remains the same. Please consider what I said about the '816 needing its data bus NOT to be driven during Phi2 low, as ignoring this detail would cause supply noise which might be the cause of your trouble. I have no further advice to offer at this time -- gonna shut down the screens and get out into the sunshine.

-- Jeff

Enjoy! And, thank you for your input!!!

Jonathan

[BigDumbDinosaur]

Dr Jefyll wrote:

...gonna shut down the screens and get out into the sunshine.

They have sunshine in your part of Ontario? I thought everything north of Gananoque is in perpetual overcast.

[Jmstein7]

I added ( VDA || VPA ) to qualify my chip selects. Now it works!

Just wanted to share the solution.

Jonathan

[Dr Jefyll]

Jmstein7 wrote:

I added ( VDA || VPA ) to qualify my chip selects. Now it works!

Just wanted to share the solution.

Glad to hear you've had success!

Since you're eager to share solutions, let me ask you to try one that's actually simpler. Please do this for me and in the name of science and for mom and apple pie (!). Here's the simpler solution:

Just use VDA to qualify the chip select for your IO devices (I guess for you that's just the ACIA). And don't use VDA or VPA to qualify the other chip selects (the memory chip selects). So, again: just ( VDA ) to qualify IO chip selects, and no other use of VPA/VDA at all.

Thanks in advance,
Jeff

[Jmstein7]

Dr Jefyll wrote:

Glad to hear you've had success!

Since you're eager to share solutions, let me ask you to try one that's actually simpler. Please do this for me and in the name of science and for mom and apple pie (!).

Don't you mean maple syrup?
We have the apple pie.

Dr Jefyll wrote:

Here's the simpler solution:

Just use VDA to qualify the chip select for your IO devices (I guess for you that's just the ACIA). And don't use VDA or VPA to qualify the other chip selects (the memory chip selects). So, again: just ( VDA ) to qualify IO chip selects, and no other use of VPA/VDA at all.

Thanks in advance,
Jeff

Okay, I'll try it and report back.

Jonathan

[BigDumbDinosaur]

Jmstein7 wrote:

I added ( VDA || VPA ) to qualify my chip selects. Now it works!

Just wanted to share the solution.

Don't lose sight of the 65C816's data bus behavior. You should qualify reads from non-65xx peripherals with Ø2 to avoid bus contention when the 816 emits the bank bits during Ø2—the bits persist for a short while after the rise of the clock. A transceiver is also useful in rapidly "disconnecting" the 816's data pins from the rest of the system when the next clock cycle starts (the start of a cycle occurs when Ø2 makes a high-to-low transition—see here for a detailed discussion of 65xx timing).

[Jmstein7]

BigDumbDinosaur wrote:

Jmstein7 wrote:

I added ( VDA || VPA ) to qualify my chip selects. Now it works!

Just wanted to share the solution.

Don't lose sight of the 65C816's data bus behavior. You should qualify reads from non-65xx peripherals with Ø2 to avoid bus contention when the 816 emits the bank bits during Ø2—the bits persist for a short while after the rise of the clock. A transceiver is also useful in rapidly "disconnecting" the 816's data pins from the rest of the system when the next clock cycle starts (the start of a cycle occurs when Ø2 makes a high-to-low transition—see here for a detailed discussion of 65xx timing).

Of course not. I have this, from you: viewtopic.php?f=1&t=6777#p87016

And I have this, from Jeff: viewtopic.php?f=1&t=6777#p87025

Together, you two have guided the design (and well!).

Jon

[Jmstein7]

Okay, here is the project repository: https://github.com/jmstein7/65c816_to_Xilinx

Quote:

Connect a 65c816 to a Xilinx CMOD A7 35T using internal SRAM and UART

Right now, you can connect a 65c816 directly to a Xilinx CMOD A7 using the CMOD SRAM and internal UART to communicate with your PC via a terminal program. The CMOD has a small monitor in ROM ($C000-$FFFF), an ACIA at $8000, and RAM from $0000-$7FFF. The LEDs indicate reset status and the e-bit status. The constraints file shows which pins to connect from the 'c816 to the CMOD.

Note: the monitor implements Woz's "Sweet 16" at $C000, if you want to use that. The monitor resides in the COE file.

This design also requires a 1.8432mhz external oscillator (clock) to be connected to the CMOD A7 so that the ACIA will work properly.

Note: You must clock the device itself ABOVE 2mhz. I've tested it up to 6mhz.

There is a thread discussing this project, with diagrams, at viewtopic.php?f=1&t=6788#p87188

You can load your programs into RAM as .prg files. Enter "X" at the monitor prompt, and you can load your program via the XMODEM protocol. I use ExtraPuTTY. Note: you can control where in RAM your programs load via your .prg files. I've been coding using Visual Studio and RetroAssembler. https://enginedesigns.net/retroassembler/

Run your program by using the address + "R" at the monitor prompt. For example, if you load your program into $1000, you would type 1000R and then enter. Make sure to jump or rts out to $C385 at the end of your program. This is the exit point that will return you to your monitor.

"L" cLears the Zero Page and resets the stack.

The other monitor function work as a typical WozMon would: (e.g.), https://www.sbprojects.net/projects/apple1/wozmon.php

Jon