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PostPosted: Fri Aug 03, 2018 5:40 pm 
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When was the last 6502 made? I would like a version with small transistors.

Could it be remade with say 40nm?

I found these: https://www.mouser.se/search/refine.asp ... =188298379

But I doubt their transistors are much smaller than the original 6502?

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PostPosted: Fri Aug 03, 2018 6:02 pm 
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Welcome rupy,

if you had taken a deeper look into this forum you would know that we cannot answer whether the 6502 could be made in 40 nm - or to be more precisely we could answer: maybe it can.

If your question is serious, ask the manufacturer: https://wdc65xx.com. They will assist you plugging a 65C02 core into an FPGA.

The latest 65C02 I bought (this year from Mouser) has a manufacturing date of 2011/KW48.


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PostPosted: Fri Aug 03, 2018 6:04 pm 
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For the stand alone chips, there's no real motivator to use the smaller die processes.

There are certainly 6502 done with modern processes, just not stand alone chips, they're 6502 cores bundled with something else.


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PostPosted: Fri Aug 03, 2018 6:11 pm 
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rupy wrote:
But I doubt their transistors are much smaller than the original 6502?


Wiki says the original 6502 used an 8um process.

The current CMOS W65C02 and W65C816parts are 0.6um according to their datasheets.

Whilst is not the massive size reduction seen in the x86 world, it's still a considerable amount.


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PostPosted: Fri Aug 03, 2018 6:22 pm 
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Welcome rupy! You might ask, why are smaller transistors desirable? The usual reasons are: reduction in cost, and increase in clock speed. But for an old design of a simple MPU, things mightn't work out quite like that. Especially if volume is so small that parts sold today were made many years ago: volume is everything in the economics of chips.

Martin A wrote:
Wiki says the original 6502 used an 8um process. The current CMOS W65C02 and W65C816parts are 0.6um according to their datasheets.
If you do the maths, that's about 200 times smaller in area.

whartung wrote:
For the stand alone chips, there's no real motivator to use the smaller die processes

Indeed - if the ring of 40 pads, which have to be a practical size for the bond wires, is a great deal bigger than the CPU core inside, then there was much less point shrinking the core - you won't get the cost reduction you hoped for because you can't get any more chips on a wafer. You might even have increased your costs!


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PostPosted: Fri Aug 03, 2018 7:13 pm 
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There's another reason why relatively large feature sizes are still relevant: they permit exceptionally low static power drain, when the chip is quiescent and doing nothing. In battery-powered devices that can be very important.

There are plenty of free 6502 re-implementations out there, which you can plug into an FPGA. Some of them can run at hundreds of MHz. All of them cost a lot more (if you include the FPGA) and consume considerably more power than a $5 WDC chip which will happily run at 14MHz (as rated) or slightly faster still (if you like overclocking).


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PostPosted: Fri Aug 03, 2018 7:17 pm 
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BigEd wrote:
Welcome rupy! You might ask, why are smaller transistors desirable? The usual reasons are: reduction in cost, and increase in clock speed.

and reduction in power consumption at a given clock speed (because of the reduced parasitic capacitances to charge and discharge).

Welcome, rupy.

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PostPosted: Sat Aug 04, 2018 3:33 am 
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Ok, thanks for all the replies.

I realize the complications, but with the slow advances of RISC-V, Apple sealing their ARM laptop with proprietary 3D stuff and Oracle messing around with Java I'm now forced to learn C (again) and then I realized I might as well go down the rabbit hole and learn some assembler. I mean if I'm going to build my own language, I might as well build it on open hardware right?

Also, I bought an old breadbin (again) at a demoscene party this summer:

Image

Dreaming of making a MMO for it with the RR-Net and silly things like that.

And now I'm full autism into this stuff, Ben Eater videos time warp and so on; I even boiled the pasta water out of the casserole yesterday! (before putting pasta in though, so no worries, but that's how you know it's getting serious)

whartung wrote:
For the stand alone chips, there's no real motivator to use the smaller die processes.

There are certainly 6502 done with modern processes, just not stand alone chips, they're 6502 cores bundled with something else.

Good point! Do you have any links?

If you made it in a SoC with memory and all that jazz, how would it compare to say a single core RPi?

I understand the impossibility of realizing it, I'm just curious of playing with the ideas of what the consequences would be.

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PostPosted: Sat Aug 04, 2018 7:39 am 
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Assuming you got it up to the same clock speed as an R-Pi, you'd still be talking about a basic 8-bit CPU with a very small register file which takes multiple cycles per instruction, versus a 32-bit CPU with a decently large register file, on which many instructions take only one cycle, with a fully functional FPU to boot. The 6502's entire address space is also smaller than a typical ARM's L1 and L2 caches.

So when people have access to modern, advanced silicon processes, they tend to use something like an ARM because it isn't actually very much bigger, but is a heck of a lot faster. Certainly it's enough faster to justify the increase in size.


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PostPosted: Sat Aug 04, 2018 9:44 am 
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Indeed, when choosing a core it's about cost, size, performance, power dissipation and support, weighted according to the business you're in. Notably HP shipped a calculator based on 6502 at one point, and later shipped calculators based on ARM. TI shipped calculators based on Z80, and on 68000, and now on ARM too.

A great deal of effort goes into making modern cores very fast - it's difficult to see the same amount of effort being put into 6502, because the market mightn't be big enough to see enough very cheap cores to recoup that development cost. The market might not even be interested in high performance to that degree. (If you wanted to implement your own ARM microarchitecture, you need an architectural license, and that will probably run to very many tens of millions of dollars. There are not more than a couple of dozen architectural licensees. To ship a product with an ARM core, the cheapest license you need might be a million. But to buy a microcontroller with ARM on it, that's just a matter of cents. Imagine the volumes!)

This is a good article on ARM's economics:
https://www.anandtech.com/show/7112/the ... odel-works

The reason these license fees can be so high is that development costs for custom chips are very high: the tool costs, the engineers, the mask costs.


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PostPosted: Sat Aug 04, 2018 10:23 am 
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Different transistor budgets lead to different types of core becoming the optimal solution.

If you've got about 10K transistors to work with, then something very like a 6502 will result. Its simplicity helped to make it cheap and therefore popular.

If you've got about 100K transistors to work with, then if you follow the same design philosophy as the 6502, you'll end up with something like the 68000 (supposedly named for its transistor count). But in the same budget you can make an ARM2, an ARM7, or a Cortex-M0+, which are vastly more capable.

If you've got a million transistors to work with, you can make better ARMs than you could at 100K.

But if you've got a *billion* transistors to work with, you start finding that some of ARM's architectural features - the very same ones that were so awesomely powerful at 100K transistors - are awkward for efficiently scaling up to long pipelines and superscalar execution. Something more like a PowerPC, whose hardware is intentionally more modular, is much less awkward along these dimensions. Hence the substantial design changes in AArch64 relative to ARM.

We are currently capable of making *trillion* transistor chips...


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PostPosted: Sat Aug 04, 2018 10:48 am 
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Useful reference for transistor counts:
https://en.wikipedia.org/wiki/Transisto ... processors

Note that ARM1 and ARM2 are cacheless, whereas ARM3 got a cache. It's arguable that the same transistor budget can be applied either to microcode or to cache. In both cases, the highly regular layout and simple function means that those square millimeters cost a great deal less in engineering time than, say, the transistors used for decode or for control. We couldn't afford to spend billion transistor budgets on CPUs if we had the same relative usage as the 6502 does: 1/3 datapath, 1/3 structured control, 1/3 unstructured control.


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PostPosted: Sat Aug 04, 2018 11:35 am 
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Again thanks for all the useful replies.

Sadly, I think we are going to have a problem with both legal and money sides of things coming up.

And these are probably going change relatively soon in a way that you might not trust them to be on your side, if you haven't already.

Even if you are a white male with technical privilege.

I think the cure is open and free; knowledge and standards, combined with cheap hardware, to both acquire and sustain.

So that hardware has to be built to last (not limited to 1000 hours like the light bulb, and this is going to be a big challenge as Moore's law fails!) and modular so it can be repaired and reused.

And finally, we need to solve the cache layers for memory, since cache misses are now our top priority.

So I'm just trying to build an alternative foundation as far outside of the societal architecture as I can without being illegal.

Of course I will keep using RPi and Java for as long as I comfortably can, but if (or rather when) that ball will be squeezed for it's last drops, I wish to have something outstanding (in both meanings of the word).

Limitations is actually a boon in my world, because they push things in directions that naturally reward you in the long run because you can understand the truth about something if it's simpler. For example by avoiding object orientation and therefore cache misses.

Here is one project that I'm working on with that frame of reference in mind: http://radiomesh.org

Image

And here's another with RPi 3+ inside (screws are 2.5mm on both projects for scale):

Image

Image

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Last edited by rupy on Tue Sep 11, 2018 4:28 pm, edited 2 times in total.

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PostPosted: Sat Aug 04, 2018 8:20 pm 
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We had a lengthy similar discussion at viewtopic.php?f=1&t=3524 : " 16-bit 6502 vs. ARM or MIPS?" There was minor tension, but it has many good points for consideration.

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PostPosted: Sun Aug 05, 2018 4:02 am 
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Thx, I will read it now.

Edit: I wish I understood things like:

Dr Jefyll wrote:
For me there was a big light bulb that went on when I realized that a TSC instruction followed by a TCD puts your Direct Page on stack. Suddenly Direct Page ceases to be a crowded place! And you get some amazing new address-mode flexibility -- for example being able to use a three-byte indirect pointer that's on-stack.

Maybe with time.

Just link this one for completeness sake: http://wilsonminesco.com/6502primer/65tutor_intro.html

Now I'm looking at the 65816, thx.

Here is a reply to Bill Mensh I wrote this morning:

Quote:
That was yesterday, today my brain is racing on the fact that understanding the complete package from hardware to software is not that far from my brain to do, specially if it's limited to 8-bit. I now even have a basic understanding of the Gerber file format.

And there is so much that I would like to improve in the computers of today. Here is a coarse list:

- HDMI/DVI are bad because they encrypt data and you really want G-sync but without licences. Display drivers have scanline legacy that makes no sense with a IPS LCD. The screen should have hardware v-sync buffer built in and draw immediately when the GPU serves a complete frame.
- USB is too expensive and generic (USB3 is just broken), you want the latency on the keyboard/mouse input to be even lower. Only keyboard/mouse input is interesting for now, everything else is a waste of time. I2C or SPI are better standards.
- You want P2P LoRa instead of Bluetooth and WiFi (again licenses). If you need speed you should use a cable.
- File systems are really bad, they have magnetic disk legacy drivers. They do not allow better indexing and searching natively (even if EXT4 made improvements). We need indexable linear compression. A small SLC NAND disc should be in the SoC for the tiny operative by default, you do NOT need a GUI for the base OS. That tiny SLC NAND should be extendable without the SoC needing to "mount" it or anything. Disc over the network should be a native thing.
- OpenGL is really bad, it assumes you want separate memory between the GPU and CPU. Shaders require very verbose communication between the CPU/GPU for now established standard things like skin mesh animation.
- Sound should be "vectorized", or a compilation of wave forms instead of discrete recordings. Think SVG for music.
- Memory should be level one memory all around (Steve Barlow of RPi fame was kind enough to explain the reason for the different levels of memory to me but I am convinced there must be some solution by integrating memory into the SoC if it is expensive and large so be it but we need to avoid cache misses at all costs, the programming languages are all very bad because either they are performance closed (Java/Swift) or they have poor fragmented compilers (C/C++).
- Everything should be integrated on the SoC with some better bus between everything, for example; the GPU should be able to do networking. So each GPU core could optionally handle multiple sockets to offload the kernel for servers where the GPUs are mostly a 3rd wheel today.
- Ethernet is bad and expensive. There should be a Internet 2 that is open and works both over Gb fiber and P2P LoRa. HTTP, TCP and IP are the final network abstractions, UDP is not needed because you can add a ackfreq property to TCP.
- Most new standards are over engineered: HTTPS, WebSockets, HTTP/2.0, IPv6, Vulcan, the list goes on and on. IPv4 should be extended with the internal IP just like the IPv6 workarounds do today, it will happen that way anyway, just take longer when you don't spell it out!
- Patents and licences are a waste of time. Ideas should be open and free.
- You need new hardware and people are afraid of that because of the arbitrary invention of money. Money and laws do not exist! There is no spoon.

The real reason for all this commotion is that we have peaked Moore's law, now it's the time to drop the legacy dependencies and build a first attempt at a "final" computer with everything in the SoC so that we have a licence free, open foundation for humanity to maintain truth and trust when stored solar energy has peaked. I think that peak Moore's law and peak-oil are actually the same thing, at least they happen at the same time and I don't think that is a coincidence.

I know this is a mouth full and laws and money make you instinctively pull back from it like if it's something dangerous. But we are all going to die, the only thing that matters is what you do before you die, and I'm not going to sit here and wait for us to destroy any hope of civilization we have left. We "the nerds" have to take control.

In practical terms, I will continue to learn, and one step in that process is probably to build my own breadboard computer with your W65C02S.

So no I don't have a "commercial" product in mind, I'm trying to build something that transcends the fiat we use to wage war. Something that outlives all bureaucracy. Society is as over engineered as our computers are becoming. Vulcan is like filling out your tax return.

Eventually I will need to build this thing with peak Moore's law transistors. But I don't know when, I'm just putting thoughts out there.

Maybe Moores law will continue and maybe we'll have fusion, but I'm not holding my breath.

And just so you know solar panels, wind turbines and electric cars are not going to save us, because electricity is not an energy source. Only photosynthesis has a free lunch, only that lunch takes millions of years to be served.

Thanks for replying with such openness.

Kind Regards,

/marc

Reading it again now in public it's embarrassing with how little I know.

Well at least you can't say that this didn't snowball out of control, I feel like some troll on speed! :\

It seems I learn by confrontation, and it's probably not healthy. Or maybe it's the other way around? o_O

Thx for listening to me if you got this far.

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