So I've been reading the book I ordered on the STD bus, trying to get a grasp of that since my system will hopefully run properly with "standard" STD products (ie production products). Its got a bunch of interesting timing diagrams relating to the Z-80 processor.

And I was thinking, since the Z-80 takes a whole 3 clock cycles to access off chip but the 6502/65816, only take one cycle. Many (if not all that I've seen thus far) of the Intel based chips for I/O also take 3 cycles.

For lower power computing a 65 series seems to be like a better choice then other chips from the era. Due to this especially for dealing with large amounts of data.

Unless I am missing something and what I am thinking is not necessarily correct.

Dimitri

That's one reason a 1MHz 6502 could out-benchmark a 4MHz Z80 or 8080.

Careful; a 1MHz 6502 can out-benchmark a 2MHz Z-80 and 8080, but 4MHz is asking for trouble. Remember the 6502 takes no less than 2 cycles per instruction, partially eating into the bus efficiency.

That being said, it is all in how the code is written. I will readily accept that average-quality 6502 code at 1MHz will run faster than average-quality Z80 code at 4MHz.

Repeating an earilier post:

There were a couple of paragraphs in an article by Jack Crenshaw in the 9/98 issue of Embedded Systems Programming where he talks about different BASICs he used on computers in the 70's and 80's, and said the 6800 and 6502 always seemed to run them faster than any other processor. He says that to him, the 6502 was a "near knock-off" of the 6800, and says he liked the 6800 architecture far more than that of the 80 family, even though his work made him much more familiar with the latter. Quoting two paragraphs:

"To me, the 8080 and Z80 always seemed to be superior chips
to the 6800 and 6502. The 8080 had seven registers to the
6800's two (plus two index registers). The Z80 added
another seven, plus two more index registers. Nevertheless,
I can't deny that, benchmark after benchmark, BASIC
interpreters based on the 68s consistently outperformed
those for the 80s.

"The biggest problem with the 68s was that they had no
16-bit arithmetic. Though the 8080 and Z80 were basically
8-bit processors, at least they had 16-bit registers (three
for the 8080, eight for the Z80), and you could actually
perform arithmetic in them, shift them, test them, and so
on. You couldn't do any of these things with the 6800 or
6502, which is one reason I still don't understand, to this
day, how the 68s could outperform the 80s in benchmarks."

After learning the 6502's instruction set and bus usage, I remember being impressed by the relative inefficiency of the 80 family, including the number of clock cycles it took to execute a single instruction, and how many extra instructions were needed because it did not have things like the 6502's automatic decimal arithmetic with the D flag, and the compare-to-0 implied in all logical, bit, arithmetic, and load instructions.

I don't know why he says, "You couldn't do any of these things in the 6800 or 6502" though. Sure you could.

The 80's even at that time though were generally run at 4MHz or a little higher IIRC, and they were still losing to the 1MHz 6502's and 6800's.

The book is neat cause it has source code in Assembly for 4 of these processors. (8085, Z-80, 6502 & 6800)

To write 6 BCD values to a MM74C917 display controller. It takes 19 lines of code to do that with the 8085, but it only takes 8 for the 6502 to do the same.

But otherwise most of the other examples they have similar code sizes.

Dimitri

I only made my claim because I wasn't aware, at the time, of the Z80 T-cycle counts for its instructions. The smallest number of T states is 4, which would account for the 1:4 performance ratio.