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8 |
171 |
Wed Mar 27, 2024 1:21 pm |
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36 |
402 |
Wed Mar 20, 2024 8:46 am |
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Handling shared data bus between 65c02 and an FPGA | 7 |
223 |
Wed Mar 13, 2024 11:57 am |
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8 |
200 |
Mon Feb 26, 2024 6:19 pm |
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30 |
721 |
Thu Feb 22, 2024 11:10 pm |
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9 |
257 |
Tue Feb 20, 2024 9:28 am |
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65020 | 17 |
11784 |
Fri Feb 09, 2024 7:13 pm |
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(solved) See Programming ATF150x with Openocd | 8 |
460 |
Thu Feb 01, 2024 8:03 am |
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40 |
1209 |
Mon Jan 15, 2024 2:34 pm |
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5 |
378 |
Tue Jan 09, 2024 11:28 am |
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Reputable source for a TL866II Plus programmer? | 11 |
2028 |
Mon Jan 01, 2024 10:50 pm |
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14 |
14430 |
Fri Dec 01, 2023 9:51 pm |
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6 |
3831 |
Fri Dec 01, 2023 5:46 am |
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25 |
6799 |
Thu Nov 30, 2023 6:04 pm |
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7 |
6814 |
Sat Nov 18, 2023 8:13 am |
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80 |
66866 |
Wed Oct 25, 2023 2:38 pm |
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11 |
9748 |
Wed Sep 13, 2023 5:07 pm |
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4 |
3309 |
Thu Aug 17, 2023 6:44 pm |
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16 |
9962 |
Thu Aug 17, 2023 1:36 pm |
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4 |
2927 |
Thu Jul 27, 2023 2:14 pm |
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2 |
3012 |
Thu Jul 20, 2023 6:51 pm |
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7 |
3249 |
Tue Jun 27, 2023 1:05 pm |
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13 |
6108 |
Sat Jun 24, 2023 5:14 pm |
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Can someone program a ATF1504 "Daryl's SPI" for me? | 2 |
2242 |
Thu Jun 22, 2023 5:54 pm |
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WinCUPL not creating .jed or .fit files | 16 |
9027 |
Tue Jun 06, 2023 4:15 pm |
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Verilog to WinCUPL generator\workflow | 20 |
9073 |
Thu May 18, 2023 2:50 am |
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4 |
4126 |
Thu Apr 06, 2023 6:03 am |
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Wincupl Error Codes | 3 |
4258 |
Wed Mar 29, 2023 7:29 am |
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WinCupl and using .S and .R extensions with the ATF 1508 | 5 |
7543 |
Mon Mar 20, 2023 11:56 am |
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5 |
5254 |
Mon Feb 06, 2023 8:51 pm |
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Is XC9572XL programmable with 5 volts? | 4 |
5334 |
Fri Feb 03, 2023 8:12 pm |
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Acorn's "Turbo" 6502 Second Processor logic in a 22V10 PLD | 3 |
5231 |
Sun Jan 29, 2023 10:32 am |
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43 |
18171 |
Fri Jan 27, 2023 1:46 pm |
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9 |
5293 |
Sun Jan 08, 2023 3:53 pm |
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26 |
12540 |
Fri Dec 23, 2022 10:00 pm |
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7 |
6083 |
Thu Dec 08, 2022 5:15 pm |
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4 |
3619 |
Tue Nov 29, 2022 4:53 pm |
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Interest for Lattice Mach XO3L as DIP? | 8 |
6297 |
Mon Nov 21, 2022 11:43 am |
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2 |
3433 |
Thu Nov 03, 2022 7:07 pm |
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7 |
5068 |
Sat Oct 29, 2022 6:11 am |
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6 |
6431 |
Wed Oct 19, 2022 8:10 pm |
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WinCUPL issues | 10 |
5734 |
Thu Sep 01, 2022 4:48 pm |
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6 |
4898 |
Wed Aug 10, 2022 10:44 am |
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55 |
39203 |
Sat Aug 06, 2022 3:50 am |
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Question: CPLD vs FPGA? | 13 |
26372 |
Sat Jul 16, 2022 9:45 pm |
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75 |
141842 |
Sat Jul 09, 2022 4:32 pm |
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Fitter error - no .CLK in .olb | 4 |
71647 |
Tue Jun 28, 2022 12:01 pm |
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216 |
988914 |
Fri Jun 03, 2022 2:55 am |
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37 |
186275 |
Thu Jun 02, 2022 3:22 pm |
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13 |
35607 |
Mon May 23, 2022 3:29 am |
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