| Author |
Message |
Forum: Programming Topic: 65816 Branch Instructions |
| PaulF |
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Posted: Sat Jan 31, 2009 6:29 pm
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Replies: 1
Views: 2199
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| Do the 65816 branch instructions cross 64k bank boundarys or do they loop back around to the start of the program bank? I've looked this up in the WDC 65816 programmers reference manual. Rather unhelpfully, it starts to say something ... |
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Forum: Programming Topic: 65816 Addressing modes and cycle counts. |
| lenkki |
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Posted: Fri Dec 12, 2008 1:25 am
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Replies: 14
Views: 8439
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| I have a few questions about the addressing modes of the 65816 MCU. 1) Is there any difference in the operation between the following modes: E=1, X=1, M=1 and E=0, X=1, M=1 ? 2) I understand that I can move the "zero-page" to a arbitrary location ... |
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Forum: Programming Topic: Register size-independent 65816 code |
| blargg |
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Posted: Fri Jan 18, 2008 5:35 am
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Replies: 2
Views: 3126
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| ... it does matter, the above technique might work best. .a8 ; tell assembler to use 8-bit immediate values for accumulator and #$0F nop ; What the 65816 sees when in 16-bit accumulator mode: and #$EA0F The same should apply to X and Y as well, though size-independent use of them would be less common. ... |
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Forum: Programming Topic: 65816 Native Mode Programming |
| 8BIT |
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Posted: Mon Jan 14, 2008 9:14 pm
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Replies: 11
Views: 6734
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| I have started my journey into 65816 native mode programming. Doing things to work outside of the first 64K requires a lot of re-thinking. The 65816 also allows for greater flexibility. Having a repository of useful code snipets would be ... |
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Forum: Hardware Topic: 65816 project (formerly 65816 code in Programming Group) |
| 8BIT |
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Posted: Thu Oct 18, 2007 3:35 pm
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Replies: 8
Views: 5702
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| ... code revision, I have hit a road block. I am feeding a 14.318MHz TTL Osc into my 95108 CPLD and dividing it down to 7.159MHz to feed the PHI2 on 65816. Using a 50Mhz Scope, the clock waveform looks terrible on both the TTL oscillator and the PHI2 output. I recall "Kc5tja" having issues ... |
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Forum: Programming Topic: 65816 code |
| 8BIT |
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Posted: Wed Oct 03, 2007 11:10 pm
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Replies: 12
Views: 7629
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| ... ($010000 - $01FFFF) with a color pattern, wait 10 seconds, inc the color pattern (repeating all 256 patterns), and refill the buffer. I am using a 65816 running at 7.159MHz with 512K of RAM. I'll need to run the processor in native mode in order to access RAM above 64K. This is my first 65816 program ... |
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Forum: Emulation and Simulation Topic: 6502/65816 emulators written in Pascal? |
| Ruud |
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Posted: Wed Aug 15, 2007 10:32 am
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Replies: 10
Views: 9134
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Hallo allemaal,
Various emulators I know, like VICE, are written in C. Does anyone know an emulator of a wellknown computer written in (Turbo) Pascal?
Thanks! |
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Forum: Programming Topic: XA65 with 65816 :: es posible? |
| kc5tja |
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Posted: Sat Sep 16, 2006 8:18 pm
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Replies: 7
Views: 5515
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| ... of ACME is starting to get annoying for extensive macro usage. Therefore, I'm currently researching XA65. However, while the XA65 allows for 65816 opcodes, it doesn't look like it has any equivalent to the .al, .as, .rl, and .rs pseudo-opcodes. These POs are used to convince the assembler ... |
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Forum: Emulation and Simulation Topic: 65816 Emulator |
| kc5tja |
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Posted: Fri Sep 08, 2006 4:46 pm
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Replies: 18
Views: 19256
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| I've e-mailed the author of XGS, to see if I can get some tips on ripping the 65816 emulator out of it and being able to compile it as a shared library under Linux. I looked at XGS 0.5.0 (which is probably ancient, since the website hadn't been updated since 2002), ... |
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Forum: Forth Topic: 65816 Assembler in Forth |
| kc5tja |
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Posted: Thu Apr 20, 2006 1:20 am
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Replies: 1
Views: 6268
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| I've done it! I've successfully spent about 8 hours writing a full-featured 65816 assembler, in Forth, for Forth. Below's a sample of how it's used. The only things to add onto it are words to save the binary images in Commodore PRG and/or raw-binary format. S-Record ... |
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Forum: Programming Topic: Object Oriented Dispatch on 65816 |
| kc5tja |
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Posted: Sat Dec 31, 2005 3:38 pm
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Replies: 62
Views: 19463
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| ... something that is becoming increasingly popular in all areas of programming, including embedded systems (hence its applicability to the 65816): object oriented dispatching mechanisms. Object orientation has proven its worth time and time again. To be fair, OO is, really, nothing more ... |
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Forum: Hardware Topic: 65816 COP instruction |
| asmlang_6 |
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Posted: Mon Sep 12, 2005 3:27 am
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Replies: 51
Views: 7092
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| The 65816 COP instruction interfaces to a coprocessor. How can I hook up a 65816 to a coprocessor so the COP instruction will interface to it? |
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Forum: General Discussions Topic: 65816 datasheet has a bug... |
| kc5tja |
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Posted: Thu Jun 09, 2005 7:23 pm
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Replies: 2
Views: 2829
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Forum: Hardware Topic: 65816 Hardware Memory Protection |
| daivox |
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Posted: Sun May 01, 2005 7:23 am
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Replies: 16
Views: 11156
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| I don't know a ton so this is all theoretical, but I believe I have generated a rough method of adding memory protection to a 65816 and would like to spark discussion on this. This won't work on 6502 because of lack of an ABORTB pin+interrupt that cancels the currently executing instruction. ... |
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Forum: Forth Topic: 65816 direct threaded NEXT |
| dclxvi |
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Posted: Mon Feb 07, 2005 6:14 am
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Replies: 16
Views: 14963
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| ... the X register is left free, so it can be used as the data stack pointer. Note that this is different from subroutine threading. In STC, the 65816 PC register is Forth's IP register, the S register is the return stack pointer, and RTS is EXIT (unnest). In this DTC implementation, the S register ... |
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