| Author |
Message |
Forum: Programming Topic: Avocet assembler for the 65C816 |
| feaxmear |
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Posted: Thu Nov 29, 2018 6:07 pm
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Replies: 9
Views: 1838
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| I have an embedded 65C02 system developed with an Avocet assembler (X6502.exe). I want to port this code to a system built around a 65C816. I've tried the Western Design Center WDC816AS.exe assembler but it fails to complete (i.e., crashes during assembly). I'm told that Avocet also made ... |
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Forum: Hardware Topic: 65C816 - Why? |
| BillO |
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Posted: Tue Nov 06, 2018 5:40 pm
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Replies: 28
Views: 7998
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| I have been thinking about some new projects and have a few ideas in mind for the 6502. However, I've been thinking about the 65C816. As something to do it has a bit of merit, but for the life of me, beyond having the experience of creating it I can't think of a compelling reason to do ... |
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Forum: Hardware Topic: A new 65C816 project |
| granati |
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Posted: Mon Oct 29, 2018 10:09 am
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Replies: 1
Views: 4422
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| I started a new project based on 65C816. In some way this project is a revision of my first attempt. The project description is on line: http://65xx.unet.bz/c16/ For now the site report a general introduction and a detailed description of ... |
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Forum: Hardware Topic: 65C816 in a VIC 20 |
| A0CBM |
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Posted: Mon Sep 10, 2018 7:50 pm
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Replies: 10
Views: 4914
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| I am working up a VIC 20 with a 65C816. My prototype works, I think, and it has 128K of memory. My question involves saving data/programs that extend into bank 1 and above with Commodore drives...is it possible? Did the SCPU need a CMD drive to do it? |
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Forum: Programming Topic: Small Strings Library 65C816 |
| granati |
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Posted: Fri Jun 22, 2018 9:25 am
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Replies: 2
Views: 2764
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| Hi All, source code for another small strings library for 65C816: http://65xx.unet.bz/strings.txt - Strings can have a max. size = $FFFF (one byte always reserved for nul terminator). - Strings can span over banks. - Fully reentrant: this library don't ... |
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Forum: Newbies Topic: 65C816 timing: clock speed vs voltage |
| bradleystach |
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Posted: Wed Jun 06, 2018 8:07 pm
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Replies: 3
Views: 3202
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| Table 4.2 in the current 65C816 data sheet list the cycle timings. The columns are arranged by max clock speed and voltage with the timings listed below. Are those timings relative to clock speed or the voltage? For instance If the cpu ... |
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Forum: Newbies Topic: Another planned 65C816 computer build and a few questions. |
| bradleystach |
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Posted: Sat Jun 02, 2018 6:15 pm
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Replies: 11
Views: 5113
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| ... ultimately be around 8Mhz as those are the limits on the CPU at 3.3v according to the datasheet. Here are my initial component choices: CPU: WDC 65C816 ROM: SST39SF040 512k x 8 Flash used as ROM RAM: AS6C4008 512k x 8 Static RAM (x4) IO: WDC 65C22 VIA (x2) and others TBD. Probably 65C51 for serial. ... |
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Forum: Newbies Topic: Newbie 65C816 Question |
| rpiguy2 |
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Posted: Tue Apr 17, 2018 8:50 pm
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Replies: 3
Views: 2510
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| In the deepest recesses of my memory I remember reading many years ago that the 8-bit data bus on the 65C816 was not a handicap because it could do two memory operations in one cycle to transfer 16-bits to the processor. Is that a false memory, or is that true. I spent ages ... |
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Forum: Programming Topic: 65C816 Instruction macros for 6502 or 65C02 |
| kakemoms |
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Posted: Wed Feb 28, 2018 8:30 am
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Replies: 3
Views: 1709
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| E.g. macros that can replace 65C816 opcode instructions if one wants to run a 65C816 program on 6502 or 65C02. Has anyone made or seen such? |
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Forum: Hardware Topic: 65C816 Memory Maping |
| Dimitri |
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Posted: Tue Sep 19, 2017 2:54 am
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Replies: 3
Views: 978
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| So long time no see. Life got severely in the way. Have a step-daughter, and ex-live in, now a wife, and two kids of my own LOL. :shock: Was going over my notes for what I wanted to build, and been trying to map the memory of the board, so far I have it down to the two attachments. Logic wise it wor... |
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Forum: Programming Topic: Some 65C816 software |
| granati |
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Posted: Mon May 22, 2017 10:24 pm
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Replies: 5
Views: 961
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| Hello to everyone, i'm in develop phase of o.s. and utilities for my home-microcomputer 65C816-based and i want share with friends here my work (of course is really a "work in progress"): B16_LAST.zip In this archive all sources are inside directories named ... |
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Forum: Programming Topic: 65C816 word alignment |
| jds |
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Posted: Thu Mar 23, 2017 10:48 pm
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Replies: 24
Views: 2843
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| I've been looking at the Apple IIgs toolbox. The datatypes and calling conventions require word (2 byte) alignment, which I found strange. Since the '816 has an 8-bit data bus I thought there was no speed advantage in word aligning the data. In the book I'm looking at the data types are like this: b... |
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Forum: Hardware Topic: 65C816, video cycles and >64K |
| cbmeeks |
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Posted: Thu Dec 22, 2016 8:07 pm
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Replies: 5
Views: 3432
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| ... and I sometimes have to get them out in the open. :-) Anyway, while studying CPLD's and the Apple II video generation, I started wondering how the 65C816 would handle this in the context of >64K of RAM. For example, the video generators of the Apple II would access RAM during the low phase of PHI2, ... |
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Forum: Hardware Topic: 16 bit SRAM (65C816) |
| cbmeeks |
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Posted: Mon Nov 28, 2016 6:35 pm
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Replies: 9
Views: 1985
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| ... bit slower. How much more complicated do you think using two 512K x 8 chips would be compared to one 512K x 16? Or, is that even practical with a 65C816? |
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Forum: Hardware Topic: 65C816 vs 68000 |
| cbmeeks |
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Posted: Fri Nov 18, 2016 4:01 am
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Replies: 131
Views: 16713
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| ... these "vs" posts, but I am curious on your thoughts. Given two theoretical machines, one driven by a 68000 (8 MHz) and one driven by a 65C816 (8 MHz) and everything else being equal....how would you rank the machines in benchmark tests? I know this is a LOADED question...and not a fair ... |
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