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 Forum: Emulation and Simulation   Topic: Extended 6502 Project (Logisim)

Posted: Sun May 17, 2020 7:42 am 

Replies: 126
Views: 17103


... of the ClearIR signal to put a zero in where the opcode would have landed, for many purposes it looks like a BRK. However, in this case the famous D1x1 signal is already in play to prevent the PC increment.) So, the 6502's behaviour is natural and simple, as appropriate for an extreme cost-reduced ...

 Forum: General Discussions   Topic: 6502 schematics based on Visual6502

Posted: Mon Apr 15, 2019 12:40 am 

Replies: 20
Views: 1592


... with short enough lable to use the same ones Visual6502 uses. That would help a little bit as well. By the way, Visual6502 has few nodes named D1x1, H1x1 and C1x5Reset. Where do these names come from?

 Forum: General Discussions   Topic: Interrupt Sequence

 Post subject: Re: Interrupt Sequence
Posted: Sun Dec 02, 2012 3:27 pm 

Replies: 13
Views: 2669


... previous discussions, such as http://forum.6502.org/viewtopic.php?t=1817 and http://forum.6502.org/viewtopic.php?f=4&t=1634 - any mention of D1x1 is worth following up. Cheers Ed

 Forum: Hardware   Topic: A taken branch delays interrupt handling by one instruction

Posted: Fri Oct 14, 2011 10:30 am 

Replies: 48
Views: 60107


Hi Rich This simulation might help to illustrate, and also this one . I think I'm right in holding onto D1X1 as the key here, although I did overstate it just now. It looks like the interrupt signal needs to be kept asserted until D1x1 goes low, which defines the point of commitment. ...

 Forum: Hardware   Topic: A taken branch delays interrupt handling by one instruction

Posted: Fri Oct 14, 2011 7:19 am 

Replies: 48
Views: 60107


... a free-run timer from the latch) but it would be good to find any kind of definitive list of such things. Ed - not sure of the significance of D1x1 in this context. It seems to me that this goes low after the interrupt sequence has already been initiated (and my guess would be that it exists ...

 Forum: Hardware   Topic: A taken branch delays interrupt handling by one instruction

Posted: Thu Oct 13, 2011 8:37 pm 

Replies: 48
Views: 60107


... bear in mind that the 6502 has registered the intention to do something about the interrupt. It has an internal bit of state, which we've called D1x1, so there comes a time when maintaining \IRQ low no longer matters. That's a small but variable number of cycles after it first went low. I think ...

 Forum: Hardware   Topic: A taken branch delays interrupt handling by one instruction

Posted: Mon Sep 26, 2011 10:19 am 

Replies: 48
Views: 60107


Just a little more on this. We'd need to redraw this section http://lh3.ggpht.com/_y0qTaB6dpOA/TIKbQonaAiI/AAAAAAAAAO4/sQMeMBB6rxM/6502-interrupts-d1x1.PNG of Balazs' schematic, because there's a missing NOR gate: a signal we've called C1x5Reset comes into play, although it's not active in these ...

 Forum: Hardware   Topic: A taken branch delays interrupt handling by one instruction

Posted: Wed Sep 21, 2011 9:39 pm 

Replies: 48
Views: 60107


... Here's a taken branch being interrupted during T2 (the following instruction is fetched and executed): cycle ab db rw Fetch pc Execute State nmi D1x1 0 2303 38 1 SEC 2303 BRK T1 1 1 0 2303 38 1 SEC 2303 BRK T1 1 1 1 2304 b0 1 2304 SEC T0+T2 1 1 1 2304 b0 1 2304 SEC T0+T2 1 1 2 2304 b0 1 BCS 2304 ...

 Forum: Hardware   Topic: NMOS 6502 Reset bug

Posted: Mon Sep 19, 2011 8:51 am 

Replies: 41
Views: 10622


... could trace all the signals I mention, and then trace back a bit further, to see where these four different case diverge. I think in fact it'll be D1x1 which is the interrupt-pending latch. (The document you cite isn't going to be definitive, compared to the circuit itself. One can say that an ...

 Forum: Emulation and Simulation   Topic: A small Apple I emulator (was: Another 6502 emulator...)

Posted: Sat Jan 01, 2011 6:21 am 

Replies: 40
Views: 15101


... as being 1. hardware interrupts IRQ & NMI will push the B flag as being 0. Except, it seems , in another case: if an NMI interrupts a BRK, D1x1 does not register a pending interrupt and B is pushed as 1. The vector used is the NMI vector. So, if an NMI handler inspects the pushed P it will ...

 Forum: Emulation and Simulation   Topic: A small Apple I emulator (was: Another 6502 emulator...)

Posted: Sat Jan 01, 2011 6:03 am 

Replies: 40
Views: 15101


... pulse: http://visual6502.org/JSSim/expert.html?graphics=f&a=0&d=58eaeaea&irq0=5&irq1=6&steps=36&loglevel=3&logmore=irq,D1x1,DPControl You'll see that the D1x1 signal (as named by Balazs in his giant schematic ) latches the pending interrupt, causes the pushed B to be ...

 Forum: Hardware   Topic: A taken branch delays interrupt handling by one instruction

Posted: Tue Sep 14, 2010 2:46 pm 

Replies: 48
Views: 60107


... cycle by cycle. (Or even phase by phase.) cyc:10 cp1:1 cp2:0 Add:2304 D:b0 RnW:1 PC:2304 SP:fd Sync:1 NMI:1 IR:b0 TCstate:111111 fetch:0 clearIR:1 D1x1:1 Wow. This is exciting material, but a little tough to comb through. The first thing I did was to reformat the simulation output text (by copy-and-pasting ...

 Forum: Hardware   Topic: A taken branch delays interrupt handling by one instruction

Posted: Sun Sep 05, 2010 9:48 am 

Replies: 48
Views: 60107


D1x1 is the output of this little collection: I think "this little collection" is the Interrupt-Acceptance-Flip-Flop I suggested. Agreed - I hadn't quite spotted that this is a flop, I was only seeing significant ...

 Forum: Hardware   Topic: A taken branch delays interrupt handling by one instruction

Posted: Sun Sep 05, 2010 4:16 am 

Replies: 48
Views: 60107


... I had a feeling you might be following this! (Ed and I had a PM discussion about ABORT, which of course is another type of interrupt.) D1x1 is the output of this little collection: I think "this little collection" is the Interrupt-Acceptance-Flip-Flop I suggested. Although ...

 Forum: Hardware   Topic: A taken branch delays interrupt handling by one instruction

Posted: Sat Sep 04, 2010 7:34 pm 

Replies: 48
Views: 60107


... (picture only shows one half of the IR but the other half is identical) The signal D1x1 is doing all the work. It's also used to control the PC incrementer (although the circuit for that doesn't look quite right to me) http://lh4.ggpht.com/_y0qTaB6dpOA/TIKaUf2IUGI/AAAAAAAAAOs/HURhw3Ze5jw/s720/6502-ir-pc-carryin.PNG ...
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