| Author |
Message |
Forum: Hardware Topic: retro-gaming display options? |
| barnacle |
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Posted: Mon Nov 18, 2024 6:43 am
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Replies: 8
Views: 230
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| ... register address - and because the pico is also providing the system clock and other signals to the 65c02 if necessary I can do clock stretching by just turning the clock off - though I hope not to. Your idea looks as if it might ... |
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Forum: Hardware Topic: Blue August project thread |
| Michael |
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Posted: Sat Jun 01, 2024 1:47 pm
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Replies: 177
Views: 86675
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| ... Cell) modules and the 'DSM' (Data Signal Modulator) module to provide clock stretching during UART access. It also provides a 1, 2, or 4 MHz CPU clock and a 256 byte RX ... |
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Forum: General Discussions Topic: Raspberry Pi logic analyser |
| drogon |
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Posted: Sun May 05, 2024 5:01 pm
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Replies: 5
Views: 1199
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| ... it to the Beebs 2Mhz bus, (via a level shifter), sampling the 2Mhz clock, reading and providing data at the right time for a 2Mhz 6502. It was ... (IIRC). Think of a slow peripheral in the 6502 world that needs clock-stretching to work... I think this might make a good project, but please ... |
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Forum: Hardware Topic: FT245R |
| barnacle |
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Posted: Fri Mar 29, 2024 5:41 pm
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Replies: 10
Views: 3372
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| ... For prototyping, I'd usually just use a 68b50 but in this case the clock speed is 3.2MHz which is theoretically too fast for the '50 (though I'll try it, you never know). I don't want to mess around with clock stretching which is bound to confuse me... or it. A later refinement of this ... |
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Forum: Programmable Logic Topic: A (Win)COUPL of Questions - ATF1504AS PLC44 |
| Proxy |
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Posted: Tue Mar 19, 2024 7:47 pm
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Replies: 38
Views: 5398
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| ... was possible to get past 14mhz, or so. the 65xx chips are insanely overclockable, and the datasheets are usually pretty... pessimistic with their ... the CPU at full speed, then you have to implement a wait state/clock stretching circuit anyways and at that point you might as well safe yourself ... |
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Forum: Hardware Topic: Moving beyond 8MHz with standard ICs |
| Yuri |
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Posted: Thu Feb 22, 2024 9:14 pm
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Replies: 40
Views: 7228
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| ... up at $FFFx where the reset, nmi and irq vectors are, so you will need clock stretching to access those locations and it will slow down IRQ and NMI processing. Maybe not ... |
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Forum: Hardware Topic: Moving beyond 8MHz with standard ICs |
| drogon |
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Posted: Thu Feb 22, 2024 8:53 pm
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Replies: 40
Views: 7228
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| ... up at $FFFx where the reset, nmi and irq vectors are, so you will need clock stretching to access those locations and it will slow down IRQ and NMI processing. Maybe not ... |
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Forum: Hardware Topic: Moving beyond 8MHz with standard ICs |
| BruceRMcF |
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Posted: Sat Feb 17, 2024 7:12 pm
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Replies: 40
Views: 7228
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| ... some extra work on the rest of the board to make running at a higher clock possible. Well, it's Dave's dream computer, My preference would have ... with the internal 25MHz pixel clock of the VGA video chip, with clock stretching to 6.25MHz for the ROM part of the memory map, but different people ... |
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Forum: Hardware Topic: Moving beyond 8MHz with standard ICs |
| Proxy |
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Posted: Sat Feb 17, 2024 11:08 am
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Replies: 40
Views: 7228
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| ... example, 70ns Flash and 10ns SRAM, and it runs fine at ~15-20MHz (with clock stretching whenever ROM or IO is accessed) usually the ROM is the slowest part which is why ... |
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Forum: Hardware Topic: Moving beyond 8MHz with standard ICs |
| ytropek |
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Posted: Sat Feb 17, 2024 10:46 am
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Replies: 40
Views: 7228
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| ... because of 1 or 2 chips makes little to no sense to me when wait states/clock stretching are a thing and pretty easy to implement. I think the Yamaha sound chip is the main ... |
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Forum: Hardware Topic: Moving beyond 8MHz with standard ICs |
| BruceRMcF |
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Posted: Sat Feb 17, 2024 3:18 am
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Replies: 40
Views: 7228
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| ... the AAY-3-8910 were eventually discarded. AFAIU, they have some form of clock slow down for the portion of the I/O page that hosts the YM2151, at ... of 1 or 2 chips makes little to no sense to me when wait states/clock stretching are a thing and pretty easy to implement. Since I think the original ... |
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Forum: Hardware Topic: Moving beyond 8MHz with standard ICs |
| BigDumbDinosaur |
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Posted: Fri Feb 16, 2024 9:42 pm
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Replies: 40
Views: 7228
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| ... and appears to be capable of 24 MHz. I used a single wait-state via clock stretching (Jeff’s AC163 circuit) for ROM and I/O accesses. The ROM is an AMD 27C256-55, which ... |
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Forum: Hardware Topic: Moving beyond 8MHz with standard ICs |
| Paganini |
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Posted: Fri Feb 16, 2024 3:59 pm
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Replies: 40
Views: 7228
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| ... by Bill (plasmo). I don't know specifically why WDC's boards are clocked at 8MHz. However, at 1MHz, each phase of the 6502's two-phase clock ... Some ways forum members deal with this: 1. Wait-states 2. Clock stretching (using Jeff's amazing `163 counter trick) 3. ROM-less systems ... |
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Forum: Hardware Topic: Moving beyond 8MHz with standard ICs |
| Proxy |
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Posted: Thu Feb 15, 2024 5:30 pm
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Replies: 40
Views: 7228
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| ... because of 1 or 2 chips makes little to no sense to me when wait states/clock stretching are a thing and pretty easy to implement. |
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Forum: Hardware Topic: My way for 6502 communications, UART & SPI/I2C |
| maurice6502 |
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Posted: Tue Jan 02, 2024 10:14 am
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Replies: 46
Views: 2467
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| ... to take in data without having to worry about doing it in half a CPU clock cycle. i've would've tried to use a single bi-directional buffer like a 74x245 and then just use onboard clock stretching for faster CPUs but obviously that doesn't work if the MCU is on a seperate ... |
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