Just an update..... Leaving the upper bits still driving multiple HCT LSI devices, when I switched to a 65C02 from a 6502, all works great!

Thanks!

I would assume that if I monitor the Data and Address signals and the high voltage stays up at about 4V then there is NOT a loading issue on these lines? I am actually loading down the upper addresses using HCT devices to decode for RAM/ROM/RIOT, etc.

Jim Knight

I am in the process of debugging one of my first 6502 projects and am having some flakey issues (mostly stupid stuff I did in layout); However, I read somewhere that there is a limit of one TTL load that can be put on the 6502 address buss for address lines A8-A15, but that A0-A7 can have multiple ...

Response to BitWise.

This actually looks very promising. Also the need to convert it to a 40 pin DIP to be pin-for-pin compatablility to the original 6532, although nice, isn't required for my specific application as I can layout the PCB for any footprint.

Don't know how to post directly to LOST's question about the 6522 compatability to the 6532. He is correct that there is no RAM in the 6522; However, not having address bits A0 to A6 also keeps the 6522 from providing the count down Timer or "T" in RIOT. The 6522, without the RAM or "R" and without ...

Hummm. Guess you are like me, booked up for the forseeable future. Also, guess I will put this design away for a while anyhow. I would think that with 6832s going for $5-$7 a pop that this would make comercial sense to somebody with way too much time on their hands! Maybe in another couple of years ...

Being new at this, didn't think there was a difference. Sorry WDC or WD or both!

[Note: The original post, which was a 6532 question, as well as the title, were overwritten with spam, which has been deleted. The rest of the topic so far remains uncorrupted.]