These Aries ZIF sockets look great. A bit expensive and hard to get in Europe.
But the connectors are 0.3mm thick and fit perfectly into standard IC sockets. To me it looks like Aries did this on purpose to allow for safe insertion.

We fairly often see damaged sockets in the land of Acorn, particularly because there are several projects which work by in-socket replacement of the CPU. One way to deal with a damaged socket is to put a turned-pin socket into it and then use that.

Yes, I've seen even projects using standard ...

The disadvantage of machined socket pins are their dimensions
The pin can be 0.45 up to 0.55mm in diameter (see https://www.greenconn.com/en/ckfa103-a002.htm )

Compared to the PDIP terminal thickness of 0.25mm

https://www.ti.com/lit/ml/mpdi001b/mpdi001b.pdf?ts=1723814880587&ref_url=https%253A ...

Thanks guys!
I've found a few possibilities at Mouser, mainly from Samtec, similar to the ones proposed by BDD. My worry though is that the pins are 0.6mm dia. (Edit - just saw that they're 0.4mm also) :)
The ones in my photo, and proposed by Barnacle, do work with the DIP sockets that have wide ...

Almost 1kB of code is quite a lot.
But the main issue is, that the source address changes quite a lot.
Destination address on the display is somehow fixed, so that part would work.

I'm not using CA65 it's an older 6502 Macro Assembler/Simulator quite helpful for correct cycle counts.

Interesting discussion on AtariAge. Couldn't find the other day.
Using your ZeroPage suggestion, I was able to reduce the time it takes down to 37ms. That's a good big step forward.
We are now at 11.62 usec per byte. The code is a bit longer, but that's not a problem.
Here is how it looks like ...

We have stock speed of 1Mhz.
In a "best case" scenario, a LDA source,y / STA target,y / iny ... we have 4+5+2 cycles/usec or 35.2 ms for 3200 bytes.
My assumption is, this is probably the best we can get.

BigEd's proposal, to make use of the ZeroPage to speed things up reminds me to some Basic ...

I had a look to several code examples on this subject and as well into the Practical Memory Move Routines by Bruce Clark, but none seems to be fast enough.

Basically we have a double buffer that needs to be block moved into the display memory.
The code should be for a standard 6502 CPU. A 160x160 ...

AY-3-8910 and SN76489AN PSG emulation for the Ohio Scientific Superboard and UK101.

Who does not remember the Premier Publication Software and Hardware projects like the AY-3-8910 Soundboard.
In combination with Basic4/5/X ROMs, the Soundboard could be programmed directly in Basic.

Both AY-3-8910 ...

Hi tius,
to calculate the instruction length for a 6502 CPU, here the code I'm using in one of my programs:

instruction_size:
ldx #$01
cmp #$00
beq done
cmp #$40
beq done
cmp #$60
beq done
ldx #$03
cmp #$20
beq done
and #$1F
cmp #$19
beq done
and #$0F
tax
lda table,x
tax
done: rts ...

@BigEd
this is what my preferred compiler spits out:
Ref: C-Compiler example: KickC version 0.85
static void delay_loop(long loops)
{
long d0 = loops;
do {
--d0;
} while (d0 >= 0);
}

translates to

.segment Code
delay_loop: {
.label d0 = $a
__b1:
lda.z d0
sec
sbc #1
sta.z d0
lda.z d0+1 ...

In the two's complement proposal, we actually create a negative number equal the positive one and count the two's complement down to zero. I would consider this as a allowed approach.
The cycle count is 5.02 in the first proposal and can be shorten by the unrolling trick down to 2.2 cycles or ...

Here is my 24 bit countdown proposal. The shown numbers represent 1sec @ 1Mhz clock speed
So it takes 1 sec to count down from 0x030AC7 to zero.

; A high byte
; y,x low word


.org $1000

lda #$03
ldy #$0A
ldx #$C7
jsr Count
brk


Count pha
txa
eor #$FF
tax
tya
eor #$FF
tay
pla ...

Yes, the 6502 NMOS version is pretty limited. I remember hand coding hex programs in my youth and always struggled with code insertion or major changes. If I had known the concept of relocatable code at that time, programs would have looked differently.
Your suggestion to improve the efficiency by ...

Thanks for the comments and feedback. To my understanding, this alternative code is taking Reg X and Y for the relative offset to the target address.
This is what I wanted to avoid, so a call or jump will not alter any register and the offset follows the JSR instruction in memory (like you expect ...