When the hour counter reaches 12, PM toggles.
Note, that the ML output carry doesn't go into the equation,
so writing decimal 12 into the hours if the hours already were not 12 this will toggle PM.
;...
PM flag:

We have sort of a comparator which checks if HH=1 and if HL=$2.
The rising edge of ...

Now we can compare with https://ist.uwaterloo.ca/~schepers/MJK/cia6526.html and see of the theories were correct :-)
Thanks!

Thanks for the hard work!

From the context of emulating the VIA in VICE, I will have to try to remember what questions I had a few months ago when I was actively looking the the VIA emulation code. Two things I remember right now:

- When the timer toggles Port B pin 7 (PB7), you write in 16b ...

Thanks for the welcoming words! I got pointed to this VHDL: https://github.com/hoglet67/BeebFpga/blob/master/src/common/m6522.vhd which is an improvement over https://github.com/mikestir/fpga-bbc/blob/master/m6522.vhd . I tried simulating it (with GHDL and GtkWave) and a few test cases I had seemed ...

6522 is next.
I am looking forward to the 6522! I am trying to improve the emulation of the VIA shift register in VICE (for the purposes of PET sound output). I'm feeling I'm getting close but I seem to be a bit stuck. In most shifting modes I seem to have mostly the correct overall timing but at ...