Sorry for not speaking up sooner, auldgeek, but you've had a misunderstanding regarding this matter. Your original comment about Ø1 prompted me to look at the schematic, and I found that Ø1 is fed to one of the active low inputs of the '138 decoder. In other words, the decoder (and the devices it ...

Garth, BDD, floobydust, 1024MAK, drogon, BigEd ........ many many thanks for all the input and forcing me to give a good deal more thought to what I'd like to do. First things first, I've heard what you say, and the board will be spared further hacking just in case there is some value there (BDD ...

hacking it up (slicing land patterns, etc.) seems like a pity and it would be a bit of a shame to hack the board about Very fair comments and maybe I'm being a bit hasty in seeking to put the board under the knife :?: As mentioned earlier the board does have a 40 pin header that breaks out the ...

First off, welcome! and Indeed welcome! thanks, great to be joining the forum, and I really appreciate the quick responses :D
The NMOS inputs won't have any problem with the CMOS outputs. However, driving CMOS inputs with NMOS outputs can be dodgy , as an NMOS output's logic 1 is a lower voltage ...

Hello all ... back in 1989 I bought a J.P. Designs Parallel 65 SBC (*) for a model railway project. I still have the receipt, purchase price back then was £127.02! The project never went anywhere but I still have the SBC. The board has R6502A, 6264 8kx8 static RAM, 2764 8kx8 EPROM, R6551 ACIA ...