I published the full version of the V6502, in the previous version missing the main file V6502.VHD, I apologize to everyone for the error

Hello
I posted this simple (but working) VGA VHDL file that I written several years ago, I used it on Altera FPGA EP3C5F256C8 and CPLD MAX II EPM570F256C5.
On the FPGA version the VRAM was included in the FPGA itself and shared with 6502 CPU, in CPLD the VRAM was an external device due to save space ...

I added a PDF file that shows the improvements of V6502

Hello

i posted an example of multitasking source code for V6502

.....the destiny of everyone (even the robots) is to become obsolete....

Hello Jeff

I am sorry for delay to answer you but I was very busy, I used the V6502 as I/O coprocessor (or slave CPU) to help main CPU (PowerPC MPC5200) to execute several high speed tasks such intelligent DMA controller, several I2C and SPI interfaces, one CAN bus, incremental encoders, and some ...

Hello

I put a my old VHDL project of a wide (16 bit) stack 6502 CPU, also I added some useful opcodes for fast contest switch, zero page relocation etc.
The CPU has binary/decimal ALU for full compatibility, I tested this CPU on several projects (on Altera Cyclone IV) as intelligent I/O coprocessor ...