Search found 64 matches

by LBSC
Thu Mar 15, 2018 2:34 pm
Forum: General Discussions
Topic: How can I use the screen with small amounts of RAM?
Replies: 11
Views: 4665

Re: How can I use the screen with small amounts of RAM?

The 2600 used a technique called "racing the beam". Although it had a small amount of RAM, it also had up to 4K of ROM. The ROM contained the bitmaps for the various sprites or tiles to render. During the horizontal blank the 6502 used the ROM to compute the bit patterns needed for the current scan ...
by LBSC
Thu Mar 15, 2018 11:30 am
Forum: General Discussions
Topic: How can I use the screen with small amounts of RAM?
Replies: 11
Views: 4665

How can I use the screen with small amounts of RAM?

I only have 128 bytes of RAM available and I want to hook it up to the screen. I know this is doable since the Atari 2600 did it with the same amount of memory, but I don't know how screens work or whatever.
by LBSC
Tue Feb 13, 2018 1:12 pm
Forum: General Discussions
Topic: Do you know any software for designing CPUs?
Replies: 2
Views: 1905

Do you know any software for designing CPUs?

Minecraft has become really tedious and slow, specially when building big computers. Is there any program that lets me design CPUs?
by LBSC
Tue Feb 13, 2018 11:06 am
Forum: General Discussions
Topic: What exactly is used for the instruction decoding in the 650
Replies: 2
Views: 2306

Re: What exactly is used for the instruction decoding in the

Logic gates decode the instructions! Seriously: the so-called PLA or ROM is just a nice organised way to build a lot of NOR gates. There is logic upstream of the PLA and there is logic downstream of it. Among the inputs are signals representing the progress of the cycles which make up each ...
by LBSC
Tue Feb 13, 2018 1:13 am
Forum: General Discussions
Topic: What exactly is used for the instruction decoding in the 650
Replies: 2
Views: 2306

What exactly is used for the instruction decoding in the 650

2. I have looked at 6502 schematics and it looks like a one-cold, but everyone else calls it a PLA or a decode ROM or a decode ROM PLA or whatever so, what exactly decodes the instructions?
by LBSC
Fri Dec 08, 2017 1:05 pm
Forum: General Discussions
Topic: Memory and the data bus
Replies: 16
Views: 3697

Re: Memory and the data bus

BigEd wrote:
It often does... perhaps you need to reread some of the explanations in the thread and study those tabulations?
Oh, I understand it now. Thanks!
by LBSC
Fri Dec 08, 2017 12:12 pm
Forum: General Discussions
Topic: Memory and the data bus
Replies: 16
Views: 3697

Re: Memory and the data bus

But what if the CPU needs to retrieve data from some address and then go back to the program line?
by LBSC
Fri Dec 08, 2017 12:06 pm
Forum: General Discussions
Topic: Memory and the data bus
Replies: 16
Views: 3697

Re: Memory and the data bus

I don't quite understand the question.

One common mistake, or confusion, which comes up from time to time, is confusing the Program Counter with the Address Bus. The Program Counter, from a software perspective, takes on successive values which are the addresses of successive instructions. Usually ...
by LBSC
Fri Dec 08, 2017 11:43 am
Forum: General Discussions
Topic: Memory and the data bus
Replies: 16
Views: 3697

Re: Memory and the data bus

You misunderstand Random Access (and you're not the first to do so!) It is to be compared to the predecessor technologies: sequential (or cyclical) memories. Things like drums and delay lines, also tapes. With these technologies, non-sequential accesses are much more time-consuming.

I think pretty ...
by LBSC
Fri Dec 08, 2017 11:37 am
Forum: General Discussions
Topic: Memory and the data bus
Replies: 16
Views: 3697

Re: Memory and the data bus

What's the point of having a Program Counter with a Von Neumann CPU like the 6502? I thought RAM was *RANDOM*.
by LBSC
Fri Dec 08, 2017 11:19 am
Forum: General Discussions
Topic: Memory and the data bus
Replies: 16
Views: 3697

Re: Memory and the data bus

Dr Jefyll wrote:
An alternative source which details cycle-by-cycle behavior is Appendix A of mcs6500 family hardware manual.
Thanks!
by LBSC
Fri Dec 08, 2017 11:18 am
Forum: General Discussions
Topic: Memory and the data bus
Replies: 16
Views: 3697

Re: Memory and the data bus

BigEd wrote:
Did you read Jeff's link for the tabulations of cycle by cycle activity? Every access takes a cycle, every byte needs an access. If an instruction is formed of an opcode and an operand, then yes, the multiple bytes will take multiple accesses which need multiple cycles.
Ah, I see. Thanks!
by LBSC
Fri Dec 08, 2017 10:57 am
Forum: General Discussions
Topic: Memory and the data bus
Replies: 16
Views: 3697

Re: Memory and the data bus

(Thanks for the tabulation reference, Jeff! I find it easiest to link to visual6502 because of my browser history and my mental context. But a tabulation is more accessible.)

Perhaps the thing to note is that a bidirectional bus is one which can carry information in one direction or another. In ...
by LBSC
Thu Dec 07, 2017 7:24 pm
Forum: General Discussions
Topic: Memory and the data bus
Replies: 16
Views: 3697

Memory and the data bus

How do you load programs and data in the 6502? The bidirectional data bus confuses me and I don't understand how can you keep programs and data in RAM. What if the instruction needs to output some data? How do you prevent it from flowing back into the instruction decoder? What about the timing for ...
by LBSC
Thu Dec 07, 2017 6:29 pm
Forum: General Discussions
Topic: Stack machines and the 6502 IS
Replies: 17
Views: 3773

Re: Stack machines and the 6502 IS

> What if my memory has only one page? What if my memory has no page at all?

This might be a good test of your understanding of memory decoding!

The 6502 has 16 address lines, and will always use 16 bit addresses. In that address space, the stack operations will always be in page one - which ...