Search found 93 matches
- Wed Aug 27, 2025 1:50 pm
- Forum: Forth
- Topic: FORTH - empty stack with TOS in register(s)
- Replies: 21
- Views: 5204
Re: FORTH - empty stack with TOS in register(s)
Well, I'm baffled. I've reviewed the .htaccess files, and don't see anything wrong with them. More significant is the fact that those files haven't been changed since 2016, so what is causing errors now? It is possible that the web host has upgraded something (PHP, Apache, etc.) that doesn't play ...
- Tue Aug 19, 2025 11:57 am
- Forum: Forth
- Topic: FORTH - empty stack with TOS in register(s)
- Replies: 21
- Views: 5204
Re: FORTH - empty stack with TOS in register(s)
Hi all. Garth looped me in on this. I've looked at the last 24 hours of the server log, and see several successful requests for the file and no error responses. (I assume the errors are being reported as either 403 Forbidden or 404 Not Found.) I'll keep investigating. Fortunately this is a simple ...
- Sun Feb 24, 2019 6:51 pm
- Forum: Forth
- Topic: M65C02A Forth VM ENTER Implementation Check Request
- Replies: 24
- Views: 3241
Re: M65C02A Forth VM ENTER Implementation Check Request
My limited understanding is that EXECUTE simply allows us to execute a word whose address isn't generally known until run-time. It's kind of like the old "ON X GOSUB aaa,bbb,ccc" structure in BASIC, right? So, in my untested DTC Forth , I simply pop what is assumed to be a valid code field address ...
- Sun Feb 24, 2019 6:44 pm
- Forum: Forth
- Topic: M65C02A Forth VM ENTER Implementation Check Request
- Replies: 24
- Views: 3241
Re: M65C02A Forth VM ENTER Implementation Check Request
I think that I can see how your code fragment works for an ITC Forth:
(a) If the target is a secondary, then ITC EXECUTE will jump into the code for ENTER / DOCOL. The secondary will terminate with an ITC EXIT / SEMIS, and the VM will continue with the IP popped from the RS;
(b) If the target is ...
- Sun Feb 24, 2019 6:38 pm
- Forum: Forth
- Topic: M65C02A Forth VM ENTER Implementation Check Request
- Replies: 24
- Views: 3241
Re: M65C02A Forth VM ENTER Implementation Check Request
Michael, I composed this before reading your latest reply.
Perhaps some pseudocode examples will help explain CONSTANT and VARIABLE. These assume that when a word is executed (either through the normal thread interpretation, or by EXECUTE) that the address of the word (CFA) is in the W register ...
Perhaps some pseudocode examples will help explain CONSTANT and VARIABLE. These assume that when a word is executed (either through the normal thread interpretation, or by EXECUTE) that the address of the word (CFA) is in the W register ...
- Sun Feb 24, 2019 4:17 pm
- Forum: Forth
- Topic: M65C02A Forth VM ENTER Implementation Check Request
- Replies: 24
- Views: 3241
Re: M65C02A Forth VM ENTER Implementation Check Request
Michael, the difference between my EXECUTE pseudo-code and your proposed implementation is that mine leaves the address of the word being executed in W. This is important if the word being executed is a secondary or a "defined word" (CONSTANT, VARIABLE, etc.). It's not sufficient to simply have that ...
- Sun Feb 24, 2019 2:41 pm
- Forum: Forth
- Topic: M65C02A Forth VM ENTER Implementation Check Request
- Replies: 24
- Views: 3241
Re: M65C02A Forth VM ENTER Implementation Check Request
Since I think that S will be the PSP, the following code should provide the same functionality. Since I can't at the moment see how to support the same behavior for a DTC Forth implementation, your suggestion of additional instructions using W has high merit.
EXEC .wrd $+2
pla.w ; siz pla
jmp ...
EXEC .wrd $+2
pla.w ; siz pla
jmp ...
- Sun Feb 24, 2019 7:35 am
- Forum: Forth
- Topic: M65C02A Forth VM ENTER Implementation Check Request
- Replies: 24
- Views: 3241
Re: M65C02A Forth VM ENTER Implementation Check Request
Okay, let me see if I understand your first trace.
PLI at 0200. That fetches the value 0205 into IP.
INXT at 0201-0202. That fetches location 0205, value 0207, into W. Then fetches location 0207, value 0203, into PC.
IENT at 0203-0204. That pushes 0207 (?) onto return stack, then I assume sets IP ...
PLI at 0200. That fetches the value 0205 into IP.
INXT at 0201-0202. That fetches location 0205, value 0207, into W. Then fetches location 0207, value 0203, into PC.
IENT at 0203-0204. That pushes 0207 (?) onto return stack, then I assume sets IP ...
- Sun Feb 24, 2019 5:40 am
- Forum: Forth
- Topic: M65C02A Forth VM ENTER Implementation Check Request
- Replies: 24
- Views: 3241
Re: M65C02A Forth VM ENTER Implementation Check Request
On the ent , I started the test with a nxt at 0x200 instead of a pli nxt instruction sequence in 0x200, 0x201. I just set up ip to a value of 0x202, which is in the parameter field of some arbitrary secondary word. I apologize for any confusion my particular set up may have caused.
Oops, yes, I ...
- Fri Feb 22, 2019 9:45 am
- Forum: Forth
- Topic: M65C02A Forth VM ENTER Implementation Check Request
- Replies: 24
- Views: 3241
Re: M65C02A Forth VM ENTER Implementation Check Request
Ack. Posting at 4 am, I'm not at my best.
For an ITC implementation I would expect the word at 0x205 to be something like
0x205: [ 0x207 ] [ IND / ENT ] [ 0x20d ] [ 0x000 ]
and IND/ENT must be modified to set IP = W+4 rather than W+2. (In ITC, the first cell of a Forth word is the address of ...
For an ITC implementation I would expect the word at 0x205 to be something like
0x205: [ 0x207 ] [ IND / ENT ] [ 0x20d ] [ 0x000 ]
and IND/ENT must be modified to set IP = W+4 rather than W+2. (In ITC, the first cell of a Forth word is the address of ...
- Fri Feb 22, 2019 9:24 am
- Forum: Forth
- Topic: M65C02A Forth VM ENTER Implementation Check Request
- Replies: 24
- Views: 3241
Re: M65C02A Forth VM ENTER Implementation Check Request
Michael, thanks for the clarification of the register display. That does help. For what it's worth, your "rot" will be known to most Forth programmers as "-rot" (rotate backwards), since the Forth ROT does TOS <= 3OS <= NOS <= TOS (where 3OS is "third on stack"). Yours looks more like the "roll down ...
- Thu Feb 21, 2019 10:28 pm
- Forum: Forth
- Topic: M65C02A Forth VM ENTER Implementation Check Request
- Replies: 24
- Views: 3241
Re: M65C02A Forth VM ENTER Implementation Check Request
Yeah, I suppose that a large part of my confusion revolves around the use of W, because I haven't run across an urgent need to utilize that register at all in any of my DTC adventures so far , so it feels like a fifth wheel to me.
I'm still reading this thread -- and I'd better go back and read ...
I'm still reading this thread -- and I'd better go back and read ...
- Fri Sep 04, 2015 9:31 pm
- Forum: Forth
- Topic: Non-6502: Forth on a 28-pin DIP LPC1114 (ARM)
- Replies: 4
- Views: 1909
Re: Non-6502: Forth on a 28-pin DIP LPC1114 (ARM)
Looks like Mecrisp compiles directly to native code (machine code), so yes, that is quite possible.
- Wed Jun 10, 2015 4:13 pm
- Forum: Forth
- Topic: What is Forth?
- Replies: 148
- Views: 187177
Re: What is Forth?
Wow, the Loeliger book in PDF! I have a hardcopy of that -- it's a classic -- but it's been out of print for years. Thanks for the links!
- Tue May 19, 2015 2:09 pm
- Forum: Forth
- Topic: Split stack vs. other approaches
- Replies: 36
- Views: 19172
Re: Split stack vs. other approaches
The oversight has now been rectified. Source code is here . Be warned that it was originally written in Forth 'screens' using 'shadow screens' for documentation; when converted to an ASCII text file, all the shadow screens got put at the end. Someday I should reformat it into 128-character lines ...