To Proxy, on Thu Nov 11 2021, I suggested minimal FPU without division and mentioned Raphson and FDIV bug. To John West, I've previously suggested hardware multiply and software division and modulo . Processors, such as TMS9900, typically supported multiply and divide (or not) as a pair. Since the ...

GARTHWILSON: It occurred to me almost immediately after publication that I might be out by a factor of 10. I thought "Hopefully, one of the amateur radio enthusiasts corrects it. Otherwise, one of the pedants will jump on it." 6502 assembly programming requires a certain level of pedantry. Therefore ...

I expected one or two negative comments and a general consensus that I devised an inadvisable memory map. I did not expect the weight and speed of negative reactions. Nor did I expect Dr Jefyll to provide the most tentative response.

Regarding software, my approach is to have applications which ...

You're probably over-thinking this problem.

No, actually, I'm under-thinking the problem. The shift register solution requires four signal lines: clock, data, set bits live - and then a programming pulse with controlled duration. I considered bodging this into a NES input peripheral extension ...