top_level Project Status (10/23/2012 - 23:49:02)
Project File: PVBSSOtest.xise Parser Errors: No Errors
Module Name: SRAMif Implementation State: Programming File Not Generated
Target Device: xc6slx9-3tqg144
  • Errors:
 
Product Version:ISE 13.4
  • Warnings:
 
Design Goal: Balanced
  • Routing Results:
 
Design Strategy: Xilinx Default (unlocked)
  • Timing Constraints:
 
Environment:  
  • Final Timing Score:
  
 
Detailed Reports [-]
Report NameStatusGenerated ErrorsWarningsInfos
Synthesis Report     
Translation Report     
Map Report     
Place and Route Report     
CPLD Fitter Report (Text)     
Power Report     
Post-PAR Static Timing Report     
Bitgen Report     
 
Secondary Reports [-]
Report NameStatusGenerated
ISIM Simulator LogOut of DateTue Oct 23 22:04:12 2012
WebTalk ReportCurrentTue Oct 23 23:49:00 2012
WebTalk Log FileCurrentTue Oct 23 23:49:01 2012

Date Generated: 10/23/2012 - 23:49:02